"Urban",
Ralph's points are good, but I am looking at the PWB from the point of view
of direct chip attach with solder bumps ...and much finer line geometries
are required. I am glad that you see ways to get there.
My experience with copper on ceramic substrates would indicate that you
could go as thin as 0.2 mils (40K - 50K Angstroms) without getting into too
much trouble. I agree with Ralph that you have to watch Sn scavenging the
copper, but prudent processes could handle this thickness. Now this is fine
for signal lines (at least for CMOS digital circuits) which are relatively
insensitive to resistance. For short runs on the PWB, you should not have a
problem. This is not true if you are building large boards, but chances are,
the fine lines are only needed on small cards (e.g. PCMCIA). However, you
must calculate the currents and current density and be aware that in very
fine lines, current densities can be a problem. You will have to have
thicker lines/widths for ground and power distribution or use multiple lines.
Actually the finer spacings may work for you. To maintain constant impedance
lines (if needed - depends on the circuit speed and line lengths) finer
spacings mean thinner dielectrics. Since the trend is toward smaller and
lighter, thin dielectrics are the way to go!
>Mail*Link(r) SMTP FWD>Questions about PCB#180#s
>
>Urban,
>
>The "size" of printed board conductive patterns for most requirements are
>based on the capability of a large group of manufacturers to manufacturer
>acceptable printed boards, and also on the functional (and sometimes
>regulatory) electrical / electronic requirements.
>
>For electrical signal conductors, the requirements are based on "electrical
>signal integrity" which means the signal must propagate from Point "A" to
>Point "B" with as acceptable level of distortion. For low frequency
>applications (rule of thumb < 1 MHz) the electrical resistance (which is a
>function of material resistivity, cross-sectional area, and conductor length)
>are the key requirements. For higher operating speed/frequencies (rule of
>thumb >1 MHz) conductor impedance becomes more critical. For impedance
>evaluations DO NOT FORGET TO INCLUDE THE RESISTANCE OF THE CONDUCTOR in your
>model, you do not wany any supprises with "lossy" transmission lines. The
>last major concern is be the impedance of the power and ground distrubution
>system, it's got to be low in order to maintain electrical signal integrity.
>
>The other problem you will have is electrical spacings, you will need to
>eliminate all contaminants that will have an effect on insulation resistance
>and dielectric strength.
>
>Lastly, if you are using copper conductive materials, there may be a problem
>with the use of traditional tin/lead solders. In theory, solid state
>diffusion of the Cu/Sn intermetallic could consume all of the Cu and I'm not
>sure what happens to the adhesion of the remaining intermetallic of the
>conductors to the base material.
>
>I hope these few thoughts help you out,
>
>Ralph Hersey
>[log in to unmask]
>
>--------------------------------------
>Date: 8/14/96 5:35 AM
>From: Urban Stromback - Kretselektro
>
>-------------------------------------
>E-mail: [log in to unmask]
>Date: 1996-08-14
>Time: 12.15.46
>
>Serious Question to IPC TechNet Forum
>
>In a soon future it will be possible to produce Printed Circuit Boards
>with tarackwith and distance < 10 um
>If i should be able to produce Boards with trackwith of 1 um, 3 um, 5 um
>and 10 um.
>How thick must the copper be and how thich is it allowed to be ?
>
>With hope waiting for answers.
>
>Urban Stromback
>at Kretselektronik Sweden AB
>Tel +46 92366640
>Fax +46 92314557
>E-mail [log in to unmask]
>
>This message was sent by Chameleon
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Ron Gedney
[log in to unmask]
Integrated Electronic Eng. Center
Watson School of Eng. & Applied Science
Binghamton University
P.O. Box 6000
Binghamton, NY 13902
607-777-4335, fax 4683
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