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March 2009

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Subject:
From:
Tan Geok Ang <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Tan Geok Ang <[log in to unmask]>
Date:
Tue, 24 Mar 2009 09:01:36 +0800
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Hi Joe,
        Thank you. I did come across this guide and even have one of
their pictures which showed void (not X-ray) but they do not indicate
what the acceptance percentage of the void is. 
	We are able to achieve less than 25% of void while one of ours
overseas supplier claims that there is not guideline from IPC 610 which
we stated as the reference to follow during the procurement.

Regards
Geok Ang

-----Original Message-----
From: [log in to unmask] [mailto:[log in to unmask]] 
Sent: Tuesday, 24 March 2009 12:02 AM
To: TechNet E-Mail Forum; Tan Geok Ang
Subject: RE: [TN] LGA acceptance

Good morning Tan,

I ran into the same problem a while back but found an excellent source
of process info on the component manufacturer's website. Check out
Linear Technology's Application Note 100, "Recommended Land Pattern
Design, Assembly and Rework Guidelines For DC/DC uModule in LNA Package"
document. It is the best source of LNA type process and accept-reject
info that I have found readily available. Sorry but I do not have a link
to their website.  Good luck

Best Regards,
-Joe


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From: TechNet [mailto:[log in to unmask]] On Behalf Of Tan Geok Ang
Sent: Friday, March 20, 2009 4:00 AM
To: [log in to unmask]
Subject: [TN] LGA acceptance

Hi All, base on IPC-A-610D, there is no explicit requirement for LGA,
all it says about Surface Mount Area Array is "for devices with solder
balls that collapse during reflow". Is there any IPC
standard/specification define the void on LGA? Thank you all and have a
nice day!
 

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-----Original Message-----

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