Thanks for your responses
The PCB is approx. 6" by 4" it is 4 layer in the digital section and 2 layer
in the RF section
basic shape is
__________________________________
| digital section |
| |
| |-------------------------------------------------
| | |
| | RF section |
----------|--------------------------------------------------
The RF section has components only located on the comp side and Solid ground
plane below
The digital section has comp both sides and inter power and ground planes
the planes do not overlap the RF plane
I will try the idea of a Faraday shield
Top side shielding of the RF section had no effect on Spurs.
I believe that the noise is getting into the RF section through the common
ground point and is caused by loop length in the
digital CLK and buss switching paths all the chips are bypassed by 10n and 100n
0805 chip parts 2 parts at the power and 2 at the GND pins
I am now routing a six layer version of the PCB with comp. and sold. sides of
the digital as fan out only plus digital ground
layer 1 (comp) is fan out and digital GND plane
layer 2 is digital ground
layer 3 is digital routing
layer 4 is digital routing
layer 5 id Digital +5v (power)
layer six (sold) fan out and digital GND plane
the RF section will remain traces and comp on comp side solder side is solid
gnd plane
Also a second question we are using SMT feed through caps to pass power and
control signals in the RF section
usually the GND pin of a feed through cap is connected to the RF plane but Loop
theory says that this will increase the loop length for the filtered noise at
is will have to flow though the RF GND plane to the single RF/Digital point and
then through the digital gnd plane to return to its source driver causing a
very large loop area.
Thanks in advance
jseeger @ rapidcad ("Jeff Seeger")
08/27/96 09:48 AM
To: technet @ ipc.org @ INTERNET
cc: (bcc: Carey Ritchey/BURN/COM/AUGAT)
Subject: Re: DES: EMI and micro switching induced noise
Carey,
I thought of another likely coupling mechanism.
You have a gnd split to isolate the two sections. You've probably
done the due diligence of connecting the gnds at where your critical
signal path crosses the realms.
It's really easy for an engineer to say, "It's only <n> Mhz, non-
critical, just let it cross the split and keep it away from the
sensitive things on the analog side.
Like most of us, including myself until I took an EMC course, we
look at the line shown on the schematic as complete and "self-reliant".
Right down to how we all represent a driver/receiver, we concern
ourselves with the signal and ignore supply and return, which are
"everywhere", right? Problem is each signal has an equal return path.
For speeds below 20 Khz (yes, that's "K"), we're pretty much correct.
Beyond that, the return path follows the signal exactly.
If a signal of over 20 Khz crosses a ground (return) split, it's
return current must find a path around the split.
If some portion of your critical signal path transitioned across a
gnd "web", and elsewhere a digital signal crossed the split, the
return current for that digital signal likely traverses the same
gnd web as your critical path. BINGO, your two realms are sharing
a conductor, namely gnd, and therefore coupling occurs.
It's possible or even likely that webbing the gnd under the offending
digital line would not be a good idea for other reasons. If so, you
may be able to tolerate this wandering return current by enlarging
the gnd web at your critical crossing so that the digital returns
find adequate conductor without the fields co-mingling. I believe
these field effects follow the rule of inverse squares, whether in
Cu or dielectric (someone please correct me if I'm wrong!), so each
increment of additional distance has exponential effect in isolation.
From here on out the potential mechanisms I could conjure will likely
take more bandwidth than they're worth.
Regards,
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
[log in to unmask] 508 649 9800
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