TI's military microwave board specification does not include a default
requirement for voids in plated board edges.  These requirements are defined
by the individual board drawing.  Some boards may allow voids with limits
(allowed only for certain specified locations, maximum number, size, or % of
plated area affected), while others may not allow such voids at all.
Allowance for these voids is a function of the board design, function,
operating conditions, etc. and since they are a part of the drawing would be
determined by a given board's design engineer.

I assume you are referring to voids in the base plating, not the surface
finish.  Imperfections in the surface finish which might otherwise indicate
a solderability problem should not be automatically rejected unless they are
located in an area where soldering will occur.

Sorry I can't offer much more help.

On 5/16/96, Ted Edwards wrote:
>
>     We procure microwave boards that to IPC-HF-318 would be Class 3 Type 3. 
>  Recently we see some suppliers having problems which result in plating 
>voids.  The criteria for voids in a plated through hole are defined but 
>voids in the plated edges of the board do not seem to be defined anywhere.
>
>     Question 1.  A void across an interconnect in a normal multilayer is 
>real bad but what about a void across the same interconnect when it is a 
>ground that goes all the way around the periphery of the finished board?
>
>     Question 2. Does anybody know where plated edge requirements are 
>listed?
>     Question 3.  Since I can not find what I am looking for in a 
>specification, if no specification exists, does anybody have criteria?
>
>          Thanks
>               [log in to unmask]
>
>
>

Regards,
David Estes
PCB Commodity Management
Texas Instruments
ph: 214-997-2942
fax: 2214-997-2656
e-mail:  [log in to unmask] (or the above address)