The breakdown voltage of a material is determined primarily by the
Dielectric Strength. FR4 has a dielectric strength of about 500
Volts/mil. Polyimide has a dielectric strength of about 750
Volts/mil. You will need to look at the impact of using thicker
dielectric with FR4 or a thinner dielectric with Polyimide. There
will be some design tradeoffs as well as cost impacts. I think
the FR4 will be the least expensive alternative.
The dielectric strength will drop as the temperature rises. I'm
not aware that the Tg has anything to do with the differences
between FR4 and Polyimide at room temperature. I anticipate that
the dielectric strength of FR4 will degrade more rapidly than
Polyimide as the temperature rises because the Tg of FR4 (about
135C) is lower than the Tg of Polyimide (about 260C).
In addition, moisture in the materials lowers the dielectric
strength. The dielectric strength at higher humidity will
decrease slightly.
Hope this helps,
Darren Hitchcock
(503) 359-2658
[log in to unmask]
"Dill, Norm J" <[log in to unmask]> Wrote:
|
|
| HV breakdown is a current topic here as well.
| In a basic double sided
| application that has a continuos 7KVAC with
| frequencies up to 30 MHz, is
| there any advantage to using the more expensive
| polyimide laminate in place
| of FR4?
| Is there any truth to the rumor that polyimide
| is more 'arc tolerant'
| because of it's higher Tg?
|
| Norm Dill
| [log in to unmask]
|
| ----------
| From: TechNet-request
| To: technet
| Subject: Re: DES:FAB:ASSY: Breakdown
| Date: Wednesday, August 07, 1996 8:46AM
|
| Dom Bragge asked a question on high voltage design
| rules: 12 mil space 1500
| V
|
| First the caveats: The voltage you quote is
| definitely in the "marginal"
| area.
| I believe that it violate IEC guidelines. I would be
| less concerned if the
| voltage represented a fault condition or was applied
| for a short time. A
| continuous application of 1500 V is very risky.
|
| That said, let me address your question. There are
| at least four possible
| failure modes. Ranked in order of risk they are the
| following: dust
| buildup,
| surface flash-over, dielectric failure, and air
| breakdown. Let me comment
| on
| the risk from each of these
|
| Dust build up is the most serious problem. I assume
| the voltage is DC (if
| it
| is AC there are other problems). The fields
| associated with a DC voltage
| attract dust. (Think of the high voltage supply in a
| TV set). Over time
| the
| dust will build up and span conductors. Under high
| humidity conditions,
| dust
| absorbs moisture and creates a leakage path that can
| carbonize leading to
| failure. We have seen this failure under field
| conditions. The only
| solution
| is to this is to maximize the separation of uncoated
| features and to assure
| there are absolutely no pinholes in the soldermask.
| Pinholes are the real
| risk so a double soldermask coating should be used. A
| conformal coating of
| the
| assembled board would also be a good idea.
|
| Surface flash-over is the second serious risk. Any
| dielectric surface
| provides a breakdown path for high voltage. The
| breakdown follows the
| surface, so a smooth surface is riskier than a rough
| surface (Think of the
| shape of the insulators they use on high voltage
| transmission lines).
| Unfortunately soldermask is very smooth and 1500
| volts can arc across gaps
| up to 30 mils wide. This phenomena is initiated at
| any "triple point" where
|
| air, dielectric and metal meet. The solution is to
| assure that the
| conductor
| is totally encapsulated. Any soldermask pinhole is a
| source of an arc that
| will flash to the nearest uncoated land. Therefore
| you must assure pinhole
| free soldermask.
|
| I have little information on the long term
| reliability of either FR-4 or
| soldermask under high voltage conditions. Voltage is
| an acceleration factor
|
| in dielectric failure, but my sense is that most
| modern materials provide
| margin and 1200 volts is not a problem. I have seen
| application where
| standing voltages of 300 to 500 volts gave no long
| term problem. I would be
| willing to gamble that you could get away with 1500
| volts. However there is
| a
| risk of long term dielectric failure, particularly if
| the temperature or
| humidity is high.
|
| Air breakdown should not be a problem. The Paschen
| curve says that the
| maximum
| spark gap for 1500 volts is about 8.5 mils. If you
| assure a 12 mil space
| air
| gap breakdown will not be an issue.
|
| To summarize. The two biggest issues with 1500 V are
| dust buildup and
| surface
| flash-over. The solution to both problems is to
| absolutely exclude
| soldermask
| pinholes. (The electric field easily finds even the
| most minute hole on a
| line
| edge). If you can exclude pinholes and guarantee a
| 12 mil space I think you
|
| may a reasonable shot at a good system life.
|
| Good Luck
|
|
| Bob Holmes
| Lucent Technologies
| [log in to unmask]
|
|
------------- Begin Original Message -------------
|
| Using 1.6mm FR4 with LPISM, we need information on
| how to prevent
| breakdown between tracks on the outside layer
| separated by 12thou,
| when subjected to 1500V continuously. What sort of
| coatings/processes
| aid this?
|
|
| --
| Regards, (A4fonHPUX9.0onHP715,710) JNA
| Telecommunications
| Limited ___ _____
| 16 Smith Street
| Dom Bragge (VK2YAK) __ / / |/ / _ |
| Chatswood NSW 2067
| PWB Designer, (R&Ddiv) / // / / __ |
| AUSTRALIA
| Tel: (+61 2) 9935 5792 \___/_/|_/_/ |_|
| email [log in to unmask]
| Fax: (+61 2) 9417 3862
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