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March 2002

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Subject:
From:
"Busko, Wolfgang" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 26 Mar 2002 10:13:57 +0100
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Leland,

sorry, but I donīt believe you, namely in that point that youīve gone back
to the previous settings and things are still wrong.
If it was Ok and than turned bad something has to have changed, your task is
to find out what is was.
If you are lucky itīs just "the one thing", experience showed that most of
the times there are more than one slight (little) changes that cause a great
mess.

The obvious things in your case to look at first are the profile (especially
the ramps), the paste (handling, environment and datecode), the parts in
question (solderability, contamination, handling and may the PCB too) and
the landpattern design (especially the castellated R-nets do need a good pad
design).
I would go through all procedures first and look for point thatīs been
changed and not set back, have been through that more than one time.

Good luck

Wolfgang
   

> -----Original Message-----
> From: Leland Woodall [mailto:[log in to unmask]]
> Sent: Tuesday, March 26, 2002 5:24 AM
> To: [log in to unmask]
> Subject: [TN] Lifted Resistors and Resistor Modules
> 
> 
> All,
> 
> We've lately noticed a marked increase in the number of lifted chip
> resistors and castellated termination resistor packs on one of our SMT
> manufacturing lines.  This began after we upped our reflow 
> profile to solve
> some solderability issues.  When we recognized this new 
> problem, we restored
> to profile to its original settings, but we're still seeing 
> the increased
> volume of "floating" components.  They're not completely 
> tombstoned, but God
> love 'em, they're trying their best to be.
> 
> Our solder prints measure as they always have, both in height and pad
> coverage.
> 
> Any suggestions?
> 
> Thanks in advance,
> 
> Leland Woodall
> Quality Coordinator
> Keihin Carolina System Technology, Inc.
> 4047 McNair Road
> Tarboro, NC 27886
> 
> Phone:  (252) 641-6750, Ext. 2865
> 
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