5mm is about right for a capacitor parallel to a score line on a  1.6mm 
(62 mil) board.  If you place parts perpendicular or have a thicker board 
, then a greater keepout is required.

I recommend doing strain measurements on your designs and to qualify a 
depanelling process.

If you have parts that are a problem, one method to reduce the strain 
without changing the design is to route a slot along the score line on the 
waste rail side of the score. Run the route at least 5mm past the part in 
both directions to maintain the clearance to the score.



Roger Mack  P.Eng. 
Manufacturing Specialist
Parker Hannifin Canada
Electronic Controls Division
1305 Clarence Avenue
Winnipeg, MB  R3T 1T4 Canada 
direct 204 453 3339 x373
[log in to unmask]
www.parker.com/ecd







From:
Blair Hogg <[log in to unmask]>
To:
<[log in to unmask]>
Date:
03-20-2012 11:44 AM
Subject:
Re: [TN] Spacing of Capacitors and resistors from PWB edge
Sent by:
TechNet <[log in to unmask]>



We try for about 0.200" or 5mm. 

Blair

On Tue, 20 Mar 2012 19:55:54 +0800, prashant chopra 
<[log in to unmask]> wrote:

>Hi,
>�
>What should be the minimum spacing�of the capacitors and resistors from 
the PWB edge if V-score routing is used and the depaneling is using the 
pizza cutter depaneling machine?
>�
>Is there any white paper available on this which recommends the minimum 
distance from the PWB edge?
>�
>Thanks to all for support.
>�
>Rgds
>Prashant
>



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