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August 1998

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Subject:
From:
Douglas Mckean <[log in to unmask]>
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Date:
Fri, 21 Aug 1998 17:49:45 -0700
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text/plain (57 lines)
I'm not sure what the function of the vias are
but here goes ...

Find out if the product is going to be subjected to
immunity testing for European approvals. The immunity
testing can involve some high voltages when doing the
ESD testing - maybe up to 8Kv.  That test involves
directly energizing the chassis at various points.
EFT (Electrically Fast Transient) also part of the
immunity testing tries to couple indirectly 500 or
even 1,000 volts onto the shields of interconnecting
cables.

UL (Underwriter's Labs) requires seperate spacings for
primary voltages (ac input) from ground and double that
from primary to secondary (say the power supply output).

Telephone approval requires taking the lines to some
fairly high voltages - like 3Kv.

If it's just me, I'd stay as far as possible.

Regards,  Doug

> Designers,
>
> We have a midplane attached to a metal chassis.  There are some vias that
> appear to be very close to the chassis and I was wondering what the
> guideline is for spacing from any via/etch/signal to chassis might be.
> While I am busy looking through the IPC design rules, I thought I'd throw
> it out on Technet to see what other opinions and guidelines might be shared.
>
> Thanks in advance.....DT

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