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August 2002

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Subject:
From:
Jack Crawford <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Sat, 24 Aug 2002 20:14:14 -0500
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Our associations strive to develop standards within our specific charters. For the most part JEDEC develops component standards and associated test methods; issues with assembling MCML/hybrid components that are subsequently assembled to a PCB is viewed separately.  IPC develops design and electronic assembly standards. Where appropriate and beneficial to our mutual associations, we team (J-STD-020, J-STD-033, J-STD-035).

Jack

Jack Crawford
Director, Professional Development and Assembly Technology
[log in to unmask]
847-790-5393
fax 847-504-2393

APEX 2003 March 31-April 2 Anaheim CA 
www.goapex.org 
IPC Printed Circuits EXPO March 25-27 Long Beach CA
http://www.ipcprintedcircuitexpo.org/

-----Original Message-----
From: My Nguyen [mailto:[log in to unmask]]
Sent: Saturday, August 24, 2002 7:12 PM
To: [log in to unmask]
Subject: [TN] Pad Geometry design standards/rules


Ladies and Gentlemen:

Does JEDEC have any rules, standards, or guideline for
component pad-geometry?  I know IPC has it (IPC-782)
but how about JEDEC?

It would be nice if I can compare the two.  Our
lay-out Engineer followed none of them which gave us
too many problems, ie. component overhang, solder
open, bridging, tombstone, etc.

Your help is always greatly appreciated!

Stacy

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