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1996

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Subject:
From:
"John Parsons" <[log in to unmask]>
Date:
Thu, 10 Oct 1996 10:43:53 -0700
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We are currently manufacturing M/L boards up to 10 layers.  I noticed that
the IPC Multilayer Test Pattern (IPC-A-27) is for 6 or 10 layer boards. 
What is used for layer counts in excess of 10 layers?  Are the coupon
sections simply expanded and repeated to accomodate higher layer counts, or
is something different used?

Regards
John Parsons
Circuit Graphics Ltd.

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