The IPC task group which is rewriting the IPC-2141 Controlled Impedance
Circuit Boards and High Speed Logic Design is looking into the need of
rewriting the Controlled Impedance Coupon Design Rules (Section 4.7 of
current document) and would welcome your input on the following issues
concerning controlled impedance coupon design. Please feel free to comment
on any or all of the below listed points.

Potential Topics for Controlled Impedance Design Rules

1)      Terminate or un-terminated traces?
2)      Test points are plated thru holes?
3)      Size of Drilled Hole?
4)      Size of pad?
5)      Single-ended pitch between signal and ground?
6)      Differential pitch and pattern?
7)      Differential pattern (no ground reference, one ground reference, two
ground references)?
8)      Width of coupon?
9)      Length of test trace?
10)     Use of thieving?
11)     Need for consistent orientation of probe pads to eliminate the need for
test operators to rotate the probe (repetitive stress)?
12)     Bends in trace or no allowed bends?
13)     Minimum spacing from one test structure to the next?
14)     Type of nomenclature and clearance specifications?
15)     Tie all ground/power planes together on coupon?
16)     Ideal location of coupon(s) on panel?
17)     Square lands to identify grounds/power reference points?
18)     Other issues?

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