There is no longer a requirement to fill empty PTH's with solder in IPC610.

Change the test probes, add note to PCA drawing that holes must be
filled, use selective solder pallet where holes are never filled or
mask as above your choice.

I work for an OEM and have a similar problem.
The evaluation criteria may not meet the test criteria.
I run single sided PCB's on wavesolder.
AME group solders to IPC610 class2.
Assemblies pass to me as ready for production.
AME does not consider soldering test points in evaluation, meets
IPC610 criteria.
My Test Engineer insists on all test points with solder or w/o solder.
ICT cannot deal with either/ or.
No test probe reliable for both.
Solder SAC305, finish is ImAg.
The window to solder the test points is narrow and requires constant
monitoring of the chip wave.



On 1/24/12, Carl VanWormer <[log in to unmask]> wrote:
> Do you have any comments to my questions about what sized holes I can
> expect to always be filled for any wave soldering process?  How about
> the parameters that relate to the maximum size hole filling?
>
>
> Thanks,
> Carl
>
>
> -----Original Message-----
> From: Stadem, Richard D. [mailto:[log in to unmask]]
> Sent: Tuesday, January 24, 2012 11:48 AM
> To: TechNet E-Mail Forum; Carl VanWormer
> Subject: RE: Wave solder - filling of "empty" holes
>
> If the CCA goes through any type of AOI post reflow, then have those
> holes added to the inspection. Almost any AOI machine can detect any
> unfilled holes.
> Also, where is the requirement for the holes to be filled or checked in
> your process documentation? Is there an operation where the operator is
> told to verify holes are filled, and touchup if not? If they
> work/inspect off of the assembly print, can a print note be added?
>
> Somewhere there needs to be a documented requirement that the holes be
> filled. Talking to a wave solder operator and trying to get him/her to
> "remember" this requirement is futile. They are busy remembering what
> they did last Friday night. Find a means to poka-yoke the process so the
> holes are always filled.
>
> OR, if there is no other requirement to have any solder in those holes,
> leave the solder out of the holes and make a test fixture consisting of
> a 2x5 bed of solid nails embedded in a non-conductive material. Just
> plug it in when you test each board. The metal pins will seal each hole
> and provide electrical contact to the barrels, without shorting the
> barrels together. To more easily envision this, suppose you took a
> plastic table with ten metal legs, turned it upside down, and plugged it
> into the connector holes....except don't use plastic, use Durostone CAS
> 716, which is dissipative.
> If you go that route, you just need to add the masking of the holes to
> the process so NO solder is added. A piece of Kapton tape will work, or
> peelable/soluble masking.
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Carl VanWormer
> Sent: Tuesday, January 24, 2012 1:01 PM
> To: [log in to unmask]
> Subject: [TN] Wave solder - filling of "empty" holes
>
> We have a PCB assembly with a 2x5 pin "engineering" header that is not
> populated on our production boards.  The normal results of our CM's wave
> solder process yields boards with the 10 holes (.040" dia.) filled with
> solder.  Our pointed spring-probe test fixture hits the centers of these
> solder-filled holes, and all is good with the world . . .
>
>
>
> Occasionally, we have some boards that do not have all of the holes
> filled (I can provide a picture if it helps the discussion).  The test
> fixture spring-probes may penetrate into the unfilled holes, making only
> intermittent contact with the hole-walls.  My final solution may be to
> obtain spring-probes with wider tips to bridge the hole, making contact
> with the annular ring, but I'd like to get opinions from the group as to
> my expectations of hole-filling in the wave solder process.
>
>
>
> I'm sure that 10mil holes will always fill, and 1000mil holes, will
> never fill.  What expectations should I have with my 40mil holes (in my
> 62 mil thick PCB)?  If the consensus is that the holes should fill, what
> suggestions can I give to my CM to facilitate my desired hole filling?
>
>
>
> Thanks,
> Carl
>
>
>
>
>
>
>
>
>
> Carl Van Wormer, P.E., AE7GD
>
> Senior Hardware Engineer
>
> Cipher Systems
>
> 1800 NW 169th Place, Suite B-100
>
> Beaverton, OR  97006
>
> Cipher Systems (503) 617-7447 x 5163
>
> Direct Line (503) 425-5163
>
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