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Subject:
From:
[log in to unmask] (George Franck X2648 N408)
Date:
Tue, 23 Jul 1996 15:06:02 -0500
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David

Try this process:
1) Normal LPI
2) Normal Solder coat
3) Flood/Plug vias with soldermask, from component side.

Advantages:
1) No exposed copper
2) No trapped Solder Level Fluxes

Disadvantages
1) Still have blind holes for trapping assembly fluxes.  Tell cusomters
this may not be suited to wave solder.  Major league solder balls can be
created this way!
2) Minor issues of soldermask over solder.

Another Die hard process is this.
1) Dry Film soldermask: Dry film tenting vias only!  Remove it every where else.
2) LPI Soldermask
3) Solder Level

Advantages
1) Vias are vacuum tented
2) No entrapped solvents.
3) Does everything you could hope for, include drive up cost!

Disadvantage
1) Costs
2) Thickness variations across the surface of the board, and perhaps under
components.  That could keep them from setting down on the surface mount
pads.

I am looking for better ideas also.  Are there any?

  ====================================================================
                           George Franck
  PWB Product Assurance                     Phone (703) 560-5000 x2648
  Raytheon E-Systems  M/S N408                    Fax   (703) 280-4613
  7700 Arlington Blvd                  E-Mail: [log in to unmask]
  Falls Church Va 22046                      E-Mail: [log in to unmask]
  ====================================================================




>Just curious:
>
>We often have customers requesting that the (LPI) soldermask be
>screened/floodcoated to plug vias with soldermask.  I understand the
>reasons behind the design; however, I'm concerned about potential
>contaminates being trapped in the via, especially from the HAL or assembly
>process.  This soldermask process can produce vias that are partially to
>fully plugged from one (or both) sides of the PCB.  This can cause
>inadequate rinsing and cleaning of the vias during the HAL or assembly
>process.
>
>Any other ideas or concerns?  Has anyone looked at this issue in detail?
>
>
>(This soldermask process can also produce exposed copper in the via, which
>has been discussed on this forum.  I believe the OSP surface finish would
>be a much safer choice with this via/soldermask design).
>
>Thanks,
>
>Dave Boggs
>Merix Corporation
>E-mail: [log in to unmask]
>
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