TECHNET Archives

March 2005

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
Deborah Schepis <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Deborah Schepis <[log in to unmask]>
Date:
Wed, 30 Mar 2005 14:30:59 -0500
Content-Type:
text/plain
Parts/Attachments:
text/plain (30 lines)
Hi folks!

I see what seems to be a contradiction in plating void criteria in the
IPC-6012 for Class 3.  Table 3-3 (Plating and Coating Voids Visual
Examination) says "none" for copper voids allowed.  Table 3-6 (Plated Hole
Integrity After Stress) says "one void allowed per specimen provided the
additional microsection criteria of 3.6.2.2 are met."  Since voids are not
created by the stress, why would they be allowed after stress (in cross
section) but not before (seen visually)?

Thanks,

Debbie

Deborah S. Schepis
Quality Engineer
Endicott Interconnect Technologies
(607) 755-3152
email: [log in to unmask]

---------------------------------------------------
Technet Mail List provided as a service by IPC using LISTSERV 1.8e
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF Technet
To temporarily halt or (re-start) delivery of Technet send e-mail to [log in to unmask]: SET Technet NOMAIL or (MAIL)
To receive ONE mailing per day of all the posts: send e-mail to [log in to unmask]: SET Technet Digest
Search the archives of previous posts at: http://listserv.ipc.org/archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
-----------------------------------------------------

ATOM RSS1 RSS2