.int [log in to unmask]
Why are we plugging / tenting these vias?
If to avoid vaccuumleaks at ICT test on a double reflow
board (no wave), why not just put solder paste on the vias? If the
via pad size on the bottom is big enuf, this make a good test pad too.
Are their other reasons to tent?
Larry Sternig
*** Original Author: [log in to unmask] 04/04/96 105923
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From: "Greg Bartlett" <[log in to unmask]>
Subject: Re: fwd- FAB- Tenting Au/Ni
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RE>>fwd: FAB: Tenting Au/Ni vias with LPI? 4/4/96
Dave,
Outstanding reply.
I've also seen some PWB failures that were caused by PTH corrosion from =
entrapped water soluble fluxes after only about 4-6 months in the field. =
Not sure whether the fluxes were from board fab (HASL operation) or from =
assembly, but it was interesting to see how much of the barrel was =
corroded.
I was with a large computer manufacturer at the time, too. We had some =
great equipment, people, and time to look into such failures. I realize =
that not everyone has these luxuries, which might contribute to the lack =
of data on this subject (and other failure mechanisms) within the industry =
as a whole. Otherwise, such failures may simply be treated as "bare board =
problems" and scrapped without more in-depth analysis.
Greg Bartlett
Mercury Computer Systems
Chelmsford, MA
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-------------------------
YES I have seen PWB failures apparently attributed to
corrosion, (visible green / white crud), in plated
holes that were tented with a dry film solder mask
on product less than 1 year old.
At a large computer mfg. corp. I was a pwb process
development, manufacturing, and product application
engineer, specializing in pwb photolithography,
Laser drilling of blind vias and pwb technology
definition for specific product applications.
Over 25 years ago I worked on reliability testing
of PWB designs in "Hostile Environments" and
office (which is often contain corrosive (hostile)
gasses. I believe that today's user enviroments are
more varied and are as corrosive as in the 70's.
In my definition of any PWB technology, I personnally
would not tent any via / hole without thoroughly
examining the type of hole (aspect ratio, blind,
through, plating thickness, plating void criteria)
the processes and chemicals that the via / hole sees
from initial drilling through final product (box)
ship, the type of tenting material, the processes
and chemicals the tented holes sees after tenting.
Smaller holes, higher aspect ratio holes and blind
holes (by design, by blockage, by partial solder
fill) are all suject to corrosion failure. Holes
of .016" and less in diameter are the concern.
I am (and am not) surprised when a PWB manufacturer
says that they have seen no corrosion failures related
to entraped contaminates in PWB holes. The least
that any PWB manufacturer do is design a state of the
art pwb reliability test vehicle to test various hole
sizes, tenting materials, ... in addition to other
pwb design features, (line widths, Cu to Cu spacings,
SIR, etc. , etc., etc.)
I don't doubt that this has been done and that someone
reading this note has done it. The question that the
pwb design engineer has to ask, "Do I feel lucky today"
If not, do more homework. All pwb mfgs are not equal.
All pwb usages are not equal, End of life for a PWB
varies upon application. Reliability requirments vary.
So what if the holes fail after product end of life.
Reference notes below:
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
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> Subject: fwd: FAB: Tenting Au/Ni vias with LPI?
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> From: "Dill, Norm J" <[log in to unmask]>
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> Subject: FAB: Tenting Au/Ni vias with LPI?
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>
> Typically when LPI is used to tent vias, one side of the board will =
seal
>
> and the other may have pin holes or openings in the mask that covers the =
> via. This creates a copper lined cup capable of trapping any subsequent =
> chemistry liquids that it may be exposed to (fluxes, cleaners, etc.).
> Is this concern reduced when nickel/gold are plated over the entire =
> copper board?
> Please share your via tenting experiences. Thanks.
>
> Norm Dill
> RF Communications
> [log in to unmask]
> =3D=3D=3D=3D=3D=3D=3D=3D Fwd by: Tony King / N =3D=3D=3D=3D=3D=3D=3D=3D
> I hear this concern sometimes from customers or designers, yet as a =
board
> manufacturer have never seen a failure in a printed circuit board =
attributed
> to copper attack in a hole partially filled with mask. Further =
indication of
> entrapped solutions in the hole should be detected at ionic cotamination
> testing, yet again has not been seen.
>
> There are several options to consider when designing product for =
plugging
> holes with mask, in reference to the solder mask artwork design, a hole
> should be plugged (exposed to light) from both sides of the hole or =
neither
> side (not plugged). The LPI process outcome is very unpredictable when
> exposing a mask filled hole from one side only at image.(dependent on =
the
> amount of mask in the holes, the degree of developing, light intensity =
etc.)
> If the design requires the holes to be plugged completely, this can be =
done
> prior to (or after) primary lpi coat using a screened dot pattern. The =
dot
> pattern plugging operation can also be performed after HAL to allow =
solder
> coating of the copper prior to plugging if corrosion is a concern.
>
> Some customers absolutely require holes to be plugged from one side =
while
> leaving the other side open for testing reasons. This dot pattern =
screening
> operation must be done after HAL to insure the partially plugged hole is
> adequately cleaned after soler coat.
>
> Though I have not seen copper fail, I would expect nickel/gold to =
present
> better protection against possible corrosion, though the gold would be =
too
> porous if immersion coated, electroplated gold would be better.
>
>
> Tony King
> Elexsys International Inc
> 603-886-0066
> [log in to unmask]
>
>
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