To expand slightly on Don's comments, I would find out about the plugging
process and quiz your fab shop about its capability to do it first. Some
shops are much better than others.
The finish is not universally flat, though not bad. I don't recommend it
for BGA via in pad designs, as the plugged finish looks and is slightly
pitted. Hole aspect ratios that can be filled should not exceed 1:6, though
fab shops that do this process are often more comfortable at 1:4. At the
other end of the range, I sucessfully had 24 mils diameter holes filled
that was only 7 mils deep (aspect ratio of 7:2). Dupont's CB100 is what I
specify, "or similar".
Peter
Don Vischulis
<dvischulis@W To: [log in to unmask]
I.RR.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: Aero/ST Group)
TechNet Subject: Re: [TN] VIAS PLATED CLOSED
<[log in to unmask]
ORG>
01/11/02
06:18 AM
Please
respond to
"TechNet
E-Mail
Forum."
Jim
IMO you should avoid true plated shut vias. As holes plate in an
electrolytic process, the outer portion of the hole plates faster than the
portion of the barrel that is near the center of board (dog bone plating).
This can result in trapped chemicals in the barrel of the hole. As an
alternative you might consider plugging the holes with a conductive epoxy
such as DuPont's CB100. A .021 dia hole in a .062 thick board is within
the
capability of several board shops. You will most likely find this
capability with shops that build high reliability products.
The holes are plugged before the final finish is applied, and they should
provide a flat final surface on the finished board.
Don Vischulis
-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Marsico, James
Sent: Thursday, January 10, 2002 3:55 PM
To: [log in to unmask]
Subject: [TN] VIAS PLATED CLOSED
Good day technet:
We're considering designing a multilayer polyimide PWB with a number of
vias
(approximately .021" diameter holes, .062" thick PWB) that are plated shut,
for thermal reasons. Can anyone comment on pitfalls regarding the fab
process? How about voids in the solid copper via? Entrapped plating
solution?
All comments are appreciated. Thanks in advance...
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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