Hi John - as you described, the sensitivity of the "h" parameter in the
solder fatigue equations can be significant. It is plausible to have an
"effective h" parameter as you described if you are just wanting to have a
first order effect estimate of the solder joint fatigue for general design
purposes. However, if you want to be more precise in the calculated
equation output, I recommend you actually measure your process for
different "groups" of component styles. The stencil thickness, stencil
aperture methodology (i.e. are you printing 1:1 or some other ratio?),
and stencil process parameters (i.e are you using a metal squeegee blade
or some version of pump head/cassette?) will all have an impact of the
final solder joint thickness. Rockwell Collins uses both methodololgies -
we have conducted testing to get accurate solder joint thicknessess for
some components such as SMT resistors, capacitors and small I/O SOICs and
in other cases, we make first order estimates for components such as QFPs
and BGAs. I'll steal Doug Paul's phrase, "It depends" (cha ching, sending
him a Diet Mt. Dew) on what level of accuracy for the specific design you
believe necessary for a use application. There are very few published
values in the literature which document solder joint thicknesses and also
list the stencil process parameter attributes/IPC-782 pad geometries that
you could use. It would be a really good thing for the industry to have
(hint, hint, IPC??) and make a very good industry paper. I'll add my
wishful thinking to yours and perhaps the IPC Stencil or 785 committee
could look into the idea as a future committee action.
Dave Hillman
Rockwell Collins
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[TN] solder joint height values (h) for leadless SMT components?
Happy 2011 TechNetters!
The solder joint height parameter "h" is a very sensitive parameter in the
E-W solder fatigue equations per IPC-D-279 and IPC-SM-785, particularly
for leadless components.
For leadless components, it is common to use half the solder stencil
height for "h", in lieu of measured values. So for example, given a 6 mil
thick solder stencil, "h" is often assumed to be 3 mils with some
acceptably small variations, to be quantified and confirmed.
However there are many leadless SMT components that have solder joints
that can not be characterized by a single "h" value. For example, SMT
resistors often have a solder fillet that is between 50% and 100% the
thickness of the component along the outside edge of the terminals and
much less under the terminals. Similary for leadless MELF diodes and
castellated LCC packages.
Ideally it would be great to build test boards with all these
configurations to get failure data and correlate these results with DPA
measurements of solder joint cross sections. Are you aware of any
published papers that discuss this type of analysis and/or attempt to
derive and correlate an "effective h" for leadless component types and
terminals based on measurements?
In lieu of any published efforts, does it seems plausible or reasonable to
develop the concept of an "effective h" or "average h" based on several
design and assembly parameters such as solder pad dimensions, wetted
terminal dimensions, solder stencil thickness, component-to-pad
misregistration, etc? Is this just wishful thinking? Alternatively, I
suppose one could make the "weakest link" argument and say that the
"minimum h" is going to dominate the behavior of the solder joint, not the
"average h" or "effective h", since the "minimum h" is where the shear
stresses and strains will concentrate and initiate wearout.
Thanks in advance for any results, comments, thoughts or suggestions that
you can provide............
Regards,
John Nieznanski
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