YAP CHOW LAN,

Yes, there are limitations with peel strength on the SLC process 
currently, but there are other way to produce microvias that don't 
have the peel strength limitation.  I also agree that you can get 
density by using .010" blind vias in surface mount pads.  However 
there is a limit to the density using .020" or larger pads 
associated with those drill sizes.

I have received some additional questions offline and will repeat 
the my response for anyone else who wants to know.  Below I will 
explain some of the tradeoffs of 3 different microvia processing 
methods.  I'm sure I won't get all the tradeoffs and that someone 
will be kind enough add to the list of processing methods.  I can 
only comment on the methods that we have used to manufacture 
boards during our investigation to determine the most cost 
effective microvia process.  

LASER defined vias currently have the best capability for 
providing the highest density.  The smallest vias that can be 
produced are about .002" in diameter.  The limitation in via size 
comes from the ability to plate smaller blind vias.  The laser can 
be used on a variety of laminates including glass reinforced and 
non-reinforced materials.  However it comes with a cost.  The vias 
are created with a laser machine one via at a time similar to a 
drilling machine.  As the number of vias increase, the cost of the 
board will increase substantially.  Also the LARGER the diameter 
of the via, the more expensive the via is to laser cut.

PHOTO defined (SLC) vias have a cost advantage over the laser vias 
because all of the vias of every diameter are created at the same 
time.  So the cost of providing the microvias in the panel is 
fixed independent of how many vias are created and how many 
different sizes are.  The vias size is currently limited by the 
photoimageable dielectric material to about .005" in diameter (but 
will probably improve with time).  However the SLC process is 
limited to one dielectric material.  In addition to the material 
limitations, the SLC process also requires an additional 
planarization process to flatten the surface after the dielectric 
material is applied and currently has a copper peel strength 
limitation.

The plasma defined vias (Dycostrate and PERL) are currently 
limited to .003" in diameter for blind vias.  Similar to the SLC 
process, plasma defined vias are formed in mass and the cost is 
fixed per panel independent of the number of microvias.  This 
process has more materials available than the SLC process, but is 
limited to non-reinforced materials.  The PERL process uses the 
same epoxy resin as in FR4 boards.  The bond strength of the 
copper to the laminate is superior to the SLC process and is the 
same as currently exists on FR4 based multilayer boards.

Darren Hitchcock
(503) 359-2658
[log in to unmask]

[log in to unmask] ( YAP CHOW LAN) Wrote:
| 
| The growing interest in the microvia processes as 
| suggested by Darren, may solve some to problems, but 
| they come with a cost.  No doubt SLC provides small 
| via holes, but it has trade-off like lower peel 
| strength and potential delamination may occur.  I 
| suppose the idea of copper-filled via is that it can 
| maintain the normal FHS of 10-12 mils and thus the 
| manufacturing cost is much lower.  It can save design 
| space such that the via can be drilled directly on 
| the SMD pads without fear that the solder paste will 
| flow through thus causing insufficient solder onto 
| the components.
| I hope the question I asked on "resin in via" is 
| still fresh, it actually drives in the same direction 
| that while we can maintain the same hole size, and we 
| can at the same time reduce some manufacturing cost.  
| Anyway, I am also interested to know more about 
| copper filled via, if anyone could further provide 
| information concerning this area, I would be very 
| much appreciate 
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| ######################################################
| > From [log in to unmask] Fri Aug 23 11:36:39 
| 1996
| > Resent-Date: Thu, 22 Aug 1996 22:15:44 -0700
| > Resent-Sender: [log in to unmask]
| > Old-Return-Path: <[log in to unmask]>
| > X-Priority: 3 (Normal)
| > To: <[log in to unmask]>
| > From: <[log in to unmask]> (Darren 
| Hitchcock)
| > Subject: re: FAB: Copper Filled Via's
| > X-Incognito-Sn: 1069
| > X-Incognito-Format: VERSION=2.01a ENCRYPTED=NO
| > Resent-Message-Id: <"q2bzK1.0.Q3D.6ZF7o"@ipc>
| > Resent-From: [log in to unmask]
| > X-Mailing-List: <[log in to unmask]> 
| archive/latest/5908
| > X-Loop: [log in to unmask]
| > Precedence: list
| > Resent-Sender: [log in to unmask]
| > Content-Length: 1269
| > X-Lines: 31
| > 
| > There is a growing number of Board Fabricators 
| offering microvias. 
| >  Most of the microvia processes (SLC, laser, 
| Dycostrate, etc.) are 
| > capable of plating shut a via placed in a surface 
| mount pad.  The 
| > vias are in the .002" to .005" diameter range 
| before plating.  The 
| > microvia processes are used to plate blind vias 
| from layers 1 to 2 
| > and layers n to n-1.  These processes give you 
| space to fan out 
| > from dense surface mount packages by putting the 
| via in the pads 
| > and then using the routing room on layers 2 and n-1.
| > 
| > If you would like more information give me a call.
| > 
| > Darren Hitchcock
| > (503) 359-2658
| > [log in to unmask]
| > 
| > 
| > 
| > [log in to unmask] Wrote:
| > | 
| > | I need to know who is providing copper filled via 
| > | holes for via hole in
| > | surface mount pad design.... Thanx in advance for 
| > help.....
| > 
| > 
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