I sympathize with Dave's position.  We have the same situation.

However, plugging the holes with solder can be a hit or miss problem -- and
here's why;

if you fill the vias with solder at assembly solder paste apply, it has to be a
higher temperature than the assembly solder to prevent it from reflowing during
the card assembly reflow cycles.  Our experience has been that solder in the
vias (typically 0.012" and under in diameter) will reflow during the assembly
process if it is a double sided IR reflow.  The solder used to fill the vias
reflows during the first IR reflow operation, and can  forms raised beads or
drips from the vias (draining out of the vias to the opposite side of the
board) .  When the board is then placed on the screening table to add the
solder paste for the opposite side, the raised solder protrusions raise the
solder paste stencils, and result in solder shorts from too much solder vol
ume.  The problem can even occur on Hasl boards.  And even if all the solder
paste is applied at one time, with certain designs like BGA's the excess solder
can cause shorts under components.  The problem is worse on holes which have
any coating in/on them which reduces the solders ability to wet to the Cu on
the hole wall.

Whether an assembly house will have this problem or not, depends upon the
assembly process routing for a particular card assembly -- and thus brings us
right back to Dave's point of everybody wanting something different.  It is hit
or miss.

I can state this clearly to all IPC members;  our experience indicates that
tenting or plugging of small diameter vias, if not done in a manner that
protects the Cu from attack from process fluids,  will cause solderability,
cosmetic and pth reliability problems.  Further, soldermask was never intended
to be a vacuum seal, and thus, we should, as a group, drive the test equipment
companies to work with us to establish alternative ways to hold board/card
assemblies in test fixtures.

Jim Herard
KBL, Product Quality Engineering
IBM Microelectronics Endicott
t/l 857-7026

---------------------- Forwarded by Jim Herard/Endicott/IBM on 06-17-97 04:44 PM
 ---------------------------

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        06-17-97 02:21 PM
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Subject: plugged vias



There have been several postings about plugged / tented vias over the last
several days. It has been stated that you must tent vias to prevent
contamination being trapped in the holes. It has then been pointed out that
tents can crack and allow contaminants in the holes. Plugging with LPISM,
plugging with epoxy mask, before hot air level, after hot air level have all
been discussed with each being the way to do it or absolutely NOT the way to
do it depending on the experience of the author. As a board manufacturer we
have been involved in these discussions with customers for years (not to
mention should it be plugged from the top-side or the bottom side, or both).
Many of them feel passionatly about their position. We, of course, strive to
give them what they want, resulting in our not being able to standardize on
one process.
  Since the desire for plugged vias is due to the need for vacuum at
in-circuit test, is there not a way to modify the test fixture so the vacuum
isn't required? If that is not feasable, has anyone tried to leave the
soldermask around the vias open, leaving solder on the hole walls after
hot-air level. Then at the assembly level, have a small opening in the
stencil corresponding to the vias. This would partially fill the via with
solder paste and would plug after reflow. Has anyone attempted this? If it
worked it would be able to be performed during an existing process step as
opposed to the extra steps required to plug vias with soldermask.

David Arivett
Cuplex, Inc

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