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January 2005

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Subject:
From:
"Kasprzak, Bill (sys) USX" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Kasprzak, Bill (sys) USX
Date:
Fri, 7 Jan 2005 15:09:43 -0500
Content-Type:
text/plain
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text/plain (101 lines)
Scott,

If my memory serves me right, I remember that someone, NEC I think, had
patented the process of gluing surface mount parts on the bottom of PCB's
prior to wave soldering.

I believe the discussion was right on this very forum.

I think NEC received a number of patents for what was perceived as "normal"
assembly practices.

I don't think anything has been awarded in terms of penalties for patent
violations.

Anyone else remember it that way?

Bill Kasprzak
Moog Inc., Systems Group, Process Engineer


-----Original Message-----
From: TechNet [mailto:[log in to unmask]]On Behalf Of Scott Nimon
Sent: Friday, January 07, 2005 2:09 PM
To: [log in to unmask]
Subject: [TN] Patent No.: US6,617,529 B2


DC members,

I have encountered a patent which any through-hole land patterns with an
annular ring of >0.4mm and used for lead-free soldering is in violation
of.  We have used 0.4mm as our standard annular ring for all
through-hole devices with  hole sizes greater than 1.6mm for years.  A
link to the patent is provided below.  Are there any IPC documents I can
use to invalidate this patent?  Any suggestions or comments will be
welcomed.



http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL
&p=1&u=/netahtml/srchnum.htm&r=1&f=G&l=50&s1=6,617,529.WKU.&OS=PN/6,617,
529&RS=PN/6,617,529



Scott Nimon

Yazaki North America

6801 Haggerty Road

Mail Stop:  2229E

Canton, MI 48187



Phone:  734-983-2630

Fax:  734-983-2631

[log in to unmask]






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