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Subject:	Re: Pads, holes, traces and Class 3 field reliability
From:	Earl Moon <[log in to unmask]>
Reply To:	TechNet E-Mail Forum.
Date:	Wed, 6 Mar 2002 06:29:19 -0600
Content-Type:	text/plain
Parts/Attachments:	text/plain (42 lines)

Peter,

It just doesn't seem too hard to me. 5:1 aspect ratio holes, especially the
diameter vs board thickness you describe is completely acceptable. Actually,
it is in the preferred comumn.

You know we've talked about this before realizing cu plating thickness and
ductility requirements must be met as .001" thickness, and all the rest
entailed in 6012, and ductility well exceeding 10%. Nothing will make the
hole walls come apart using this criteria to the extent all else meets
6012's figure 3.5 and associated requirements in that section. Of course,
laminate integrity is important as well and voiding requirements in the
laminate evaluation area cannot exceed that which is specified. Don't want
any voids propagating into cracks extending into the thermal evaluation
zones/holes and causing cracks.

Copper foil, for very high reliability boards, such as some Class III types,
also should be very ductile. This means using rolled annealed copper instead
of ED type. We need the plated hole interface to internal layers to be
capable of withstanding thermal stress and shock as well. Also, as indicated
in section 3, clear requirements must be met for hole plating to surface
conductors.

Actually, instead of more discussion on my part, IPC 2221, etc., and 6012
cover all the ground, and much more, you are concerned about. There's little
else to say.

Very best wishes on your endeavor and its success,

Earl

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