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From:
Bill Gaines B160 x2199 <[log in to unmask]>
Date:
Mon, 8 Apr 96 13:57:01 PDT
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Andy Pedersen asked about trace with to current capacity requirements.

In addition to Kevin L. Seaman's variables (conductor width, thickness
and current) the board layout has an impact also, in a flex design,
The test folks caused a short (get to blame them _this_ time ;) )
that put 4 amps on a .013 trace.  Where the trace was near other 
copper, the board survived, but de-laminated in more open areas.
(and we still don't realy know how _long_ it was shorted) 
(The trace is still connected & not shorted to any near by traces)

In "Electromechanical Design" by Ronald A Walsh, pg 255, 6.6.10
"Fusing Time-current for copper connections" he quotes an equation
by I.M. Onderdonk:
(let's see if I get this right..)

33(I/A)**2 * S = log10(((Tm-Ta)/234+Ta)+1)

I=A * ((log(((Tm-Ta)/234+Ta)+1))/(33 * S)) **.5

I=current, Ampers, A=conductor area, cir mils, S=time current applied,
seconds, Tm=melting point of copper in dec C, Ta= ambient Temp in deg C.

Has any one used this?  I haven't tested it out ( we try to keep the 
smoke _in_ the parts don't you know ;)  ).

Bill Gaines
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