Rudy,
what do you say about this? Agree?
Simon's theory is viable, I think, but I'm not an expert on these things, so
I would like some confirmation.
/Inge

----- Original Message ----- 
From: "S.Huetter" <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, September 11, 2009 11:56 AM
Subject: Re: [TN] Need clever comments


> Inge,
>
> I knew that you will ask this question :-)
>
> Yes, it has to be the electrostatic/voltage potential.
> You have a different potential over the Copper conductors causing the 
> solved
> copper to precipitate on the soldermask.
>
> However, I am not a immersion Sn process engineer and have not seen this
> particular defect before but that is what I assume. I recommend to do a
> process audit if possible.
>
> Simon
>
> Hernefjord Ingemar wrote:
>> Simon,
>>
>> your idea is very realistic, however, if too much copper is
>> solved and begins to precipitate on the soldermask, WHY
>> should it only be on top of the conductors? Electrostatic attraction?
>>
>> Inge
>>
>>
>>
>> -----Original Message-----
>> From: TechNet [mailto:[log in to unmask]] On Behalf Of S.Huetter
>> Sent: fredag 11 september 2009 10:23
>> To: [log in to unmask]
>> Subject: Re: [TN] Need clever comments
>>
>> Inge,
>>
>> IMHO the cause for Copper residues on soldermask is the Im.Sn process.
>>
>> Check out the process from Atotech:
>> http://www1.atotech.com/start.php3?cl_my_id=578839
>>
>> I assume the board maker has not used the Atotech process as
>> it is "the Whisker-Free process" but if you look at the
>> Crystallizer process you'll see that the Copper content has
>> to be controlled. The cause for the Copper residues is IMHO
>> the overdue chemistry life time (max. MTO).
>>
>> I can only compare it to our inhouse ENIG process as we
>> outsource the Im.Sn-process.
>> If we would overrun the MTO we would get excessive plating on
>> the base material and soldermask.
>>
>> Regards
>> Simon
>>
>> Inge wrote:
>>> Jack &Paul, FYI.
>>>
>>> Today I had a close look at the cross sections. What I found was
>>> this:
>>>
>>> 1. The Tin plating was done AFTER solder mask (Jack was right) 2. The
>>> solder mask was very uneven, thickness between 5um and 25 um.
>>> 3. Despite the corrupted surface, the solder mask is homogenous, no
>>> vertical cracks found.
>>> 4. The copper that I found earlier on top of the conductor, i.e. on
>>> the solder mask, that copper had no connection with the conductor
>>> copper.  Which means that these contaminations had NOT migrated
>>> through the solder mask.
>>> 5. I can still not figure out from where the copper contaminations
>>> come.
>>>
>>> So, all that remains is the question about the copper contaminations
>>> tha embedded in the very surface of the solder mask. I have to adjust
>>> my report and resend it to our customer and the board maker.
>>>
>>> Thanks to your critisism,  I can now redo the analys, starting from
>>> a more correct standpoint.
>>>
>>> Your are great!
>>>
>>> /Inge
>>>
>>>
>>>
>>>
>>> ----- Original Message -----
>>> From: "Inge" <[log in to unmask]>
>>> To: <[log in to unmask]>
>>> Sent: Wednesday, September 09, 2009 8:09 PM
>>> Subject: Re: [TN] Need clever comments
>>>
>>>
>>>> Jack,
>>>>
>>>> SMOBC is the common industrial standard, as you pointed out,
>>>> however, there ARE some fabricators that apply the solder mask after
>>>> Tin/Lead-ing the copper traces. The later method has an obvioius
>>>> disadvantage, see below quoted from an article written by US
>>>> Environmental Agency:
>>>>
>>>>  " This method predominates for several reasons. Copper is a surface
>>>> that lends itself to rigorous cleaning, which is essential for
>>>> solder mask adhesion. Tin-lead under solder mask will liquefy during
>>>> soldering and may cause the mask to blister and peel. The hot air
>>>> solder leveling process generally produces less waste water and
>>>> introduces less lead into the waste water stream than tin-lead
>>>> plating and reflow. Despite these advantages, well-known
>>>> disadvantages also exist. The shelf-life of hot air solder leveled
>>>> circuits is short and solder thicknesses on pads and hole barrels is
>>>> notoriously difficult to control. For these reasons, a small
>>>> minority of specifications continue to call for tin-lead plate and
>>>> reflow or other alternati air solder leveling, nomenclature
>>>> screening, and finally, gold edge plating if necessary. "
>>>>
>>>> I think that is what happened to our boards....." cause the mask to
>>>> blister and peel"...
>>>>
>>>> Another paper describes Tin under solder mask this way:
>>>>
>>>> " Facility F initially was concerned with the soldermask breakdown
>>>> where the Tin leaches underneath the soldermask....etc"
>>>>
>>>> Quoted from  EPA (United States Environmental Protection Agency.
>>>>
>>>> When I started the investigation (had just some hours to spend
>>>> before reporting the result!), I was fully convinced that these
>>>> boards were SMOBC, but our customer said they used tinning before
>>>> soldermask. I have asked for a confirmation from the board
>>>> fabricator, but got no answer.
>>>>
>>>> Thanks for your comment, good critics.
>>>>
>>>> Inge
>>>>
>>>>
>>>> ----- Original Message -----
>>>> From: "Jack Olson" <[log in to unmask]>
>>>> To: <[log in to unmask]>
>>>> Sent: Wednesday, September 09, 2009 4:44 PM
>>>> Subject: [TN] Need clever comments
>>>>
>>>>
>>>>> I know I'm late to the game, but I can't resist asking this
>>>>> question:
>>>>>
>>>>>> From my experience, the tin is applied AFTER soldermask, so
>>>>> you have mask over bare copper, and tin over exposed copper.
>>>>>
>>>>> The tin in PHOTO2.JPG in the exposed area looks beautiful, so isn't
>>>>> the question (ignoring the whiskers for the moment) "How can bare
>>>>> copper erupt through the mask?"
>>>>>
>>>>> Unless I missed one of your previous posts, it seems to me that any
>>>>> speculation about copper poking through the tin finish is
>>>>> irrelevant. I'm only addressing Question 2 below, but you mentioned
>>>>> introducing a nickel barrier, and that will not be plated under the
>>>>> mask either, will it? only on exposed circuitry...
>>>>>
>>>>> just wondering,
>>>>> Jack
>>>>>
>>>>>
>>>>> -=-=-=-
>>>>>
>>>>>  *Subject:* Need clever comments *From:* Hernefjord Ingemar <
>>>>> [log in to unmask]> *Reply-To:* TechNet E-Mail Forum
>>>>> < [log in to unmask]>, Hernefjord Ingemar
>>> <[log in to unmask]> *
>>>>> Date:* Mon, 7 Sep 2009 13:21:54 +0200 *Content-Type:* text/plain
>>>>>
>>>>>
>>>>> Hi all, need some professional backup regarding MIL quality boards.
>>>>>
>>>>> Objects: FR-4 Class III double-sided multi-layer boards, populated
>>>>> with SOICS, BGAs,and a lot of passive components.
>>>>>
>>>>> Observation 1 : the non soldered board have lots of Tin whiskers on
>>>>> inside of the PTH barrel. My thought is this: if whiskers can grow
>>>>> long before the board is assembled, then ain't it likely that even
>>>>> CAF can be generated?  See photo 1.
>>>>>
>>>>> Observation 2:  Copper has somehow penetrated the solder mask. This
>>>>> can be found everywhere along the conductor traces. You need a very
>>>>> good light microscope and a SEM to see it. See photo 2.
>>>>>
>>>>> Board data: Copper with 0.8 micrometer Immersion Tin. No nickel
>>>>> barrier. Solder mask thickness not specified.
>>>>>
>>>>> Application: Typical MIL-883 environment
>>>>>
>>>>> Q1: What is your opinion about that thin Tin directly on copper? I
>>>>> dislike the concept. Copper is very mobile at high temperatures,
>>>>> and combined with humidity, there can be leakage currents and
>>>>> corrosion issues. Even if the boards are CCd, there is a risk with
>>>>> copper .
>>>>>
>>>>> Q2: I gave  the advice to introduce a nickel barrier, but our
>>>>> customer claimed, that they can't because of pressfit connectors
>>>>> and pressfit test pins on the board. Furthermore, they had heard
>>>>> that one cannot have nickel platings when pressfitting, because the
>>>>> nickel will crack and oxidize and cause electrical disfunction. Is
>>>>> this your opinion too? Are there any relevant testing behind such
>>>>> statements?
>>>>>
>>>>> Thanks in advance
>>>>>
>>>>> Inge
>>>>>
>>
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