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| Reply To: | TechNet E-Mail Forum. |
| Date: | Thu, 16 Sep 1999 11:55:15 -0700 |
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The strips are only visible in profile looking at the board on edge.
The IL strips are "revealed" when the board is routed.
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From: Tom Burek [SMTP:[log in to unmask]]
Sent: Thursday, September 16, 1999 11:24 AM
To: [log in to unmask]
Subject: Re: [TN] Measuring copper thickness @ in
Are you saying that there is no pre-preg or laminate covering
each successive layer and that each layer with it's copper is
accessible? If so, how is this accomplished by the fab house?
Tom Burek
[log in to unmask]
-----Original Message-----
From: [log in to unmask] [SMTP:MIME
:[log in to unmask]]
Sent: Tuesday, September 14, 1999 6:52 PM
To: [log in to unmask]
Subject: Re: [TN] Measuring copper thickness @ incoming
inspection
<< File: ENVELOPE.TXT >>
------------------------------------------------------------------------
-- --
For OL, you can use an eddy current tester or something similar.
We use
a couple of different tools from CMI. You can reach them at
http://www.cmiinternational.com/
For IL, you could put a resistance coupon on the board.
Lee Ritchey includes a nifty little trick in his High-Speed PCB
and
System Design Course. He calls it a stacking stripe. I'll
assume he
won't mind my posting it here in exchange for a plug to take his
course
(last I looked it was offered through the Continuing Education
in
Engineering, University Extension at University of California,
Berkeley
- Go Bears!) He places a strip of copper 50 mils wide by 200
mils long
on layer 1. On each successive layer, the strip is 25 mils
longer. The
strip is placed so that the centerline of the 50 mil width will
be on
the finished card edge. When the board is routed, the strips
are
exposed and can be inspected without microsection. It looks
something
like this for a 4-layer board.
Layer 1 _______
Layer 2 __________
Layer 3 _____________
Layer 4 ________________
The correct order of layers and copper weights can be verified
this way.
He even includes a trace of a specific width so that proper
etching can
be verified. Please note that this is contrary to the typical
requirement to avoid exposing copper on the card edge. If you
use this,
you'll probably need to specify that exposed copper is
acceptable in the
stacking stripe area of the card. Obviously the stacking
stripe needs
to be isolated from functional circuits and planes inside the
card.
----------
From: Brian Gaynor [SMTP:[log in to unmask]]
Sent: Tuesday, September 14, 1999 12:53 AM
To: [log in to unmask]
Subject: [TN] Measuring copper thickness @ incoming
inspection
Hi,
What devices or techniques do you know of that can
measure the
thickness
of external & internal copper on a PWB from a PWB
Manufacturer
that does not
involve micro-section?
Best regards,
Brian Gaynor
Artesyn Technologies Europe.
[log in to unmask]
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