Mail*Link(r) SMTP               FWD>RE>Placement of bypass caps

Doug Brooks

Ref. you question "Where do I place it.", the bypass caps that is.

I differ with Jerry --

The electrical interconnections between the bypass cap and the component
power/ground terminals should be as short as possible.  For most digital logic
families (exception ECL) the ground connection is the most critical and it
likewise should be as short as possible.  The supply voltage is less critical
and therefore can be longer (to the bypass capacitor and IC component
terminal).  For ECL (in particulat the higher speed stuff like the MECL-3 and
beyond) that have "open" collector outputs, the Vcc (higher, most positive) is
the most critical connections and the Vee (lower, more negative is less
critical).

For the following technical reasons:

As in some of my privious postings, this one is long (again) but I do believe
it is of general interest (in particular to designers) after design, for the
rest of us it's too late.


1)  All logic families except ECL) have a "spiking" like current in the power
distribution system when the output drivers go to their alternate logic level.
 This is because most bipolar logic families have "internal" electrical
components and circuitry consisting of a resistor (connected to Vs - the
supply voltage having a resistance of 25-300 ohms) and two transistors in
series across the supply terminals in the IC.  The output terminal is
connected between the two transistor; that results in one transistor between
the output terminal and ground, and the resistor and the other transistor
between the output terminal and supply voltage (Vs).  In the case of MOS
families, the output circuitry consists of two MOS FETs connected in series
between the ground and supply voltage conductors.  There is one MOS FET
connected between the output terminal and the ground and supply voltage
terminals.  As the output signal makes the transition from one level to the
other BOTH OUTPUT SEMICONDUCTORS ARE TURNED ON AND CURRENT IS LIMITED BY THE
SERIES IMPEDANCE OF THE RESISTOR OR THE INTRINSIC RESISTANCE OF THE
SEMICONDUCTORS THEMSELVES.  Not only that, but this occurs for EACH output
terminal in the component when they "switch" - worst case when they all/most
switch simultaneously, as in a computer bus driver system.  In "fast" digital
signal switching applications, the transient current may be up to 100 mA for
each output circuit that is switching and the pulse width is typically only a
few ns wide.  The primary purpose of the bypass cap is to supply the necessary
current for this spiking current and to keep it out of the power/ground
distribution system -- that means do not use the power/ground distribution
system in you printed (circuit) design to control the current spiking.  The
key is to keep the interconnections between the bypass capacitor and the
power/ground teminals of the component as short as possible in order for the
bypass capacitor to supply the necessary "spiking" current and not the
power/ground distribution system.  If you don't, this spiking current results
in induced voltages in you power/ground system and reduces digital signal
integrity.  In the case of ECL, you don't have the spiking current, instead
you have more of a transition current as the output signals are transferred
between the differential output transistors.  

2)  Electrical signal integrity is a two-part major concern for serious
printed circuit designs. The location and interconnection of the bypass cap
(as described above) is one concern, and how the output "spiking" current can
add to the desired electrical signal's signal integrity itself.

First, all electrical signals require an electrical interconnection network
that consists of two signal paths from point "A" to "B"; one of them we call
the "supply/source/signal conductor" the other one is left off all of the
schematic and logic diagrams, it is the electrical ground/return conductor.

Next, for almost all logic families such as the old TTL, S, ALS, CMOS, HC,
HCT, F, and most of the remaining alphabet soup of semiconductor technologies
(exception ECL), all electrical signals are ground referenced (with ground
meaning "a common or return path" that may be "grounded" in parlance with the
NEC's electrical safety for premises wiring).  

And, we must understand the complete "electrical circuit", interconnection
network, and components from an IC's output terminal through the component to
the power/ground distribution system.  For brevity, let's assume the IC's
output terminal is directly connected to the junction of the output driver
transistors / FETs with zreo impedance.  The output signal path (neglecting
whether its flow direction is electronic or electrical) for a logic low is
from the output teminal, through the "turned-on" lower transistor that is
interconnected to a "ground" conductor that goes to a "land" in/on the silicon
die, that is wire-bonded/TAB to the lead frame that is attached to a printed
board land that is connected by conductors to the printed board ground.  For a
logic high is about the same, except in the case of bipolar, the output
transistor will be connected to a series resistor which is connected through
the supply voltage distribution system in the die to a land on the die, which
is wire-bonded/TAB to the lead frame, to the printed board land, to a
conductor, to the power distribution system.  In the case of most MOS, the
output FET replaces the transistor and series resistor.

Focusing on the "spiking" current concern, assume the bypass capacitor is
coupled with a very low impedance to the IC's terminals and we hook up an
electrical signal monitor between the IC's ground terminal on one of the IC's
output terminals that is (electrically held) at a logic low.  The output
voltage should typically be less than 400 mV.  Now, let's switch all of the
other output terminals from a logic high voltage to a logic low.  When this
event occurs, the output circuitry that is switching momentarily shorts out
the power/ground lands ON THE DIE, which is interconnected by the
interconnection impedances from the lands on the die to the IC's terminals. 
The spiking current supplied by the bypass capacitor flowing to the IC's
terminals and through to the die will generate a transient voltage between the
IC's terminal through the dies land and into the power/ground interconnections
in the IC's die.  Focusing on output voltage monitor on the one output
terminal, we will see (generally) a positive spike voltage on the "unswitched"
terminal output monitor.  This spike voltage is called "ground bounce" and is
inherent to the IC itself.  Now, lets add some inductance (conductor) between
the IC's ground terminal and the bypass cap, let's remove the ground
connection from the IC's termial to the bypass cap (and also the output
monitors ground).  Now using the same scenario, the "spiking" current now
flows through the added conductor length, and this transient voltage due to to
the added conductor length (significantly) adds to the ground-bounce voltage
and creates a very nasty rise in the un-switched output terminal -- not
exactly a desirable situation.

Now the concerns for the desired electrical signal's (integrity).

Using the same model as above,  we will now add conductors to all of the
output terminals that are to be switched - and as we know, as we add
conductors we also add capacitance.  When all of the outputs are a logic high,
the conductor capacitance is charged up to the logic high voltage, which in 5
Vdc systems will be greater than ~2.4 V.  When the output is switched to a
logic low, all of the conductor caps will discharge from the logic high to the
logic low voltage.  Using electron current flow, the current flow will be from
the lowest voltage the the higher voltage of the capacitor.  In this example,
the ground system is one of the conductor's capacitive electrodes and the
conductor itself is the other.  The conductor capacitive dischange current
will be from ground, through the printed boards ground impedances to the IC's
gound teminal, through the IC's ground interconnection impedance, through the
output transistor and to the IC's output terminal to the attached conductor. 
This "electrical signal's" discharge current flow (for a high-to-low
transition) is in the same direction as the previous "spiking" current" and it
therefore adds to the "ground-bounce" as measured on the "un-switched" IC's
output terminal.

For brevity, I'll just say that the ground (signal and power) reference system
is the most critical for serious printed (circuit) design and the supply
voltages are of a lesser concern.  This is because the output voltages will
"approximately center" between a good solid, un-quivering, un-flinching ground
and the supply voltage.

I've avoided ECL, in short, the output pull-up/termination for ECL is at the
end of the transmission line attached to the IC's output (driver) terminals. 
The termination resistor is tied to the Vcc (positive most) supply voltage and
the true electrical signals are across this termination resistor, which is
between Vcc and the output terminals (and for now I'll forget to mention
differential ECL electrical signals).

Sorry about the length, but I hope this communicated my knowledge, experiences
and arguements for the location and interconnection of bypass capacitors.

Ralph Hersey
e-mail:  [log in to unmask]

--------------------------------------
Date: 4/5/96 11:20 AM
From: Jerry Schwartz
>I have several sources (including the Motorola FACT book) that say bypass
>caps should be placed as close as possible to the GROUND pin of the IC (not
>the power pin.) But I have seen few really specific discussions of why this
>is so.
>
>Some of my customers insist on having them placed as close as possible to
>the power pin.
>
>Can anyone give me a definitive explanation of where they should be placed,
>and why?  Thanks
>
>Doug Brooks
>
>

Bypass caps are used to filter and maintain a steady voltage to the device
they are near. Putting them near the power pin is a safer bet than the ground
pin. If they are near the ground pin or just in the vicinity of the device
they a just doing the job of general filtering. Using different values
and or different types of caps betters you chances of filtering out unwanted
noise. It depends upon the frequencies in the design as to which types of
caps should be used. ie: ceramic, alum, etc., etc.

        You can also say that your PCB is a CAP. The closer together your
power and ground plane the more capacitance. This can be calculated by your
board shop, and be factored in on your decision to use caps or not to (or
just on specific parts ie: memory). I have done this and have saved not only
room on my designs but ost as well. The cost of an average bypass cap after
it has been placed is usually about 7-8 cents.

Regards,

Jerry Schwartz
[log in to unmask]
"May The Schwartz Be with You"


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To: Doug Brooks <[log in to unmask]>
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Subject: Re: Placement of bypass caps
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