TECHNET Archives

March 2000

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"Kelly M. Schriver" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 6 Mar 2000 07:46:47 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (110 lines)
Hi Tim & All -

A few words on tented and filled vias from both perspectives - designer and
end user:

- Principle advantage - carried out as the SMOBC process this can
seal/insulate surface conductors/via pads, etc., particularly under low
profile part bodies and improve the overall surface dielectric condition of
the board PRIOR TO CONDUCT OF THE ASSEMBLY PROCESS.  Note that this is NOT a
substitute for adequate cleanliness after the assembly process.

- Main disadvantage - IF vias are open, or tented on one side only, I have
had the experience that they will accumulate a witches brew of process
fluids and other stuff, which is impossible to totally remove.  This, in
turn, tends to result in early product mortality - generally as a result of
a bit of electro-chemistry between exposed conductive areas.

My personal preference is to fill the vias, eliminating any sizable internal
voids, and do a complete SMOBC coverage on both sides of the board, less
termination and test pads, obviously.  An increasing number of board
suppliers have these capabilities, using a variety of materials.  I prefer
to limit materials to the epoxy family, for reasons of stability and
durability.  There are a number of very good via fill compounds from
Enthone, Lakwerke Peters, Dexter, and others.  DuPont offers some thermally
conductive fill materials for special applications.  I have also seen the
fill operation conducted with reasonable success using "Howefill" on
polyimides, but haven't done any long term work in this area.   I have found
it necessary to work closely with the board supplier to ensure that they
clearly understand the needs of the design and to ensure that the finished
boards do not produce any surprises in the assembly process.   Other than
limiting the materials to the epoxy family, I have not found it necessary to
limit to a single manufacturers compounds, thus allowing the fab house to
work with that they are accustomed to dealing with rather than pulling in
something new.

I have used LPI epoxy plugged vias successfully, but prefer the added
insurance of a completely filled via for class 2 and class 3 products.
Occasionally, the LPI plug process can yield less than ideal results, or a
few plugs can blow with the rapid heating of the HASL or assembly soldering
process.

As Jeff mentions in his post, TechNet archives will provide a wealth of
information on this subject.

Regards - Kelly




-----Original Message-----
From: Timothy Reeves <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Friday, March 03, 2000 5:29 PM
Subject: [TN] Mask-tented vias


>Technetters:
>What is your opinion on tenting of vias with LPI soldermask? If a design
>gives leaves the mask film open over vias, the mask will be UV-exposed,
>though not to the degree of the mask on the surface, resulting in some mask
>coverage of copper inside the vias, but not as durable/thick as that on the
>surface. Some of it will remain, some may end up HASL'ed. What is the
>reliability of the "in-between" surfaces that don't coat with solder, but
>also don't appear to be covered with mask? The "old specs" used to allow
>some "haloing" around pads where thermal cured mask tapered off and left a
>coppery ring around the solder-coated pad. Is this the same thing, and is
it
>a concern?
>Designers/end users: If your design allows the vias to be covered with
mask,
>but the vias don't fill with mask, what problems do you foresee?
>Thanks for any and all replies.
>G'day
>Timothy Reeves
>ECD Circuit Board Division
>13626 South Freeman Road
>Mulino, OR 97042
>[log in to unmask]
>(503) 829-9108 (800) 228-8198  FAX (503) 829-5482
>
>##############################################################
>TechNet Mail List provided as a free service by IPC using LISTSERV 1.8c
>##############################################################
>To subscribe/unsubscribe, send a message to [log in to unmask] with following
text in
>the body:
>To subscribe:   SUBSCRIBE TECHNET <your full name>
>To unsubscribe:   SIGNOFF TECHNET
>##############################################################
>Please visit IPC web site (http://www.ipc.org/html/forum.htm) for
additional
>information.
>If you need assistance - contact Keach Sasamori at [log in to unmask] or
>847-509-9700 ext.5315
>##############################################################

##############################################################
TechNet Mail List provided as a free service by IPC using LISTSERV 1.8c
##############################################################
To subscribe/unsubscribe, send a message to [log in to unmask] with following text in
the body:
To subscribe:   SUBSCRIBE TECHNET <your full name>
To unsubscribe:   SIGNOFF TECHNET
##############################################################
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional
information.
If you need assistance - contact Keach Sasamori at [log in to unmask] or
847-509-9700 ext.5315
##############################################################

ATOM RSS1 RSS2