Hi, James,
I'm trying to picture your "thermal reasons" and how plating over the holes
will help, reliably. I haven't encountered a process for plating over
holes, and 21 mils seems quite a canyon to bridge. I'ld be very interested
to know how this is done.
I'm very involved with conduction-cooled MLB's 60 mils thk, that require a
lot of thermal management. 'Thermal' via holes are punched through the
board and plated to internal thermal planes. To improve the conductive
cross-sectional area of these holes, I had them filled with silver-loaded
epoxy, which was then Cu-plated over. This process also served the
secondary purpose of filling holes that otherwise, as you suggest, would
contain entrapped plating solutions.
Depending on your substrate material and operating environment, I could
imagine a plated 'cap' splitting over time through temp cycling and
mechanical stresses, assuming it survives the hot assembly processes with
the expansion of entrapped gasses. Not serious, thermally, perhaps, but it
would allow the outside atmosphere to circulate inside the holes as well,
which might not be so good inteh long run.
Peter
"Marsico, James"
<James.Marsico@D To: [log in to unmask]
P.AIL.COM> cc: (bcc: DUNCAN Peter/Asst Prin Engr/ST
Sent by: TechNet Aero/ST Group)
<[log in to unmask] Subject: [TN] VIAS PLATED CLOSED
>
01/11/02 05:55
AM
Please respond
to "TechNet
E-Mail Forum."
Good day technet:
We're considering designing a multilayer polyimide PWB with a number of
vias
(approximately .021" diameter holes, .062" thick PWB) that are plated shut,
for thermal reasons. Can anyone comment on pitfalls regarding the fab
process? How about voids in the solid copper via? Entrapped plating
solution?
All comments are appreciated. Thanks in advance...
Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879
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