Hi Steve,
Whether you are right or wrong depends on the severity of the application 
environment. For the vast mojority of the PCBs you are right, it makes no 
real reliability difference. However, for severely temperature cycles PTVs 
the reliability preference hierarchy is as follows: BEST—vias completely 
filled with solder (but nobody can guarantee a 100% fill a 100% of the time), 
VERY GOOD—no solder in the via at all (one of the reasons for tenting), GOOD 
to BAD (depending on severity of operational T-cycles)—partially filled vias, 
particularly with the transition from fill to no-fill near the PCB center 
(stress concentration).
J-STD-001B does not address or even mention reliability issues——one of its 
shortcomings——much of what is in it is good practice to produce good quality 
(which is of course not the same as adequate reliability).

Werner Engelmaier
Engelmaier Associates, L.C.
Electronic Packaging, Interconnection and Reliability Consulting
7 Jasmine Run
Ormond Beach, FL  32174  USA
Phone: 904-437-8747, Fax: 904-437-8737
E-mail: [log in to unmask], Website: www.engelmaier.com 

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