Werner,
don't know if I already mentioned it, but we have seen similar 
one-side-delamination long ago. In that case the lamination tool was not 
correct, so the pressure didn't apply full force along one side. If that is 
Pradeep's problem, he ought to see this on outermost boards on the panel. I 
mean, if the panel has nine boards (3x3) the delamination should be seen 
only on three boards or one (outer) column.
/Inge

--------------------------------------------------
From: "Werner Engelmaier" <[log in to unmask]>
Sent: den 6 April 2010 19:11
To: <[log in to unmask]>
Subject: Re: [TN] Outer layer separation

> Hi Paul,
> One statements below, we part company
>
>
> I doubt that plating, hole prep or drilling will be significantly 
> influential.
>
> The expected failure modes are barrel cracks or knee cracks in copper. You 
> may not find the
> copper cracks as they will be small and randomly distributed in the 
> sample.
>
> I KNOW, that "plating, hole prep or drilling will be significantly 
> influential" in the creation of barrel cracks; not so much in shoulder 
> cracks.
> Barrel cracks are not small or randomly distributed. In most cases they 
> are (1) 180 to 360°, (2) at prepreg layers, (3) concentrated near the 
> middle of the PCB, (4) at drilling defects that ripped glass fibers out of 
> the resin matrix and copper plating could not cover them up, (5) at 
> excessive smear removal/positive etchback sites.
> Werner
>
>
>
>
>
>
>
>
> -----Original Message-----
> From: Paul Reid <[log in to unmask]>
> To: [log in to unmask]
> Sent: Sun, Apr 4, 2010 9:51 am
> Subject: Re: [TN] Outer layer separation
>
>
> Hi Pradeep,
>
> As you know it is imprudent to comment on specific materials so what I am
> writing is an overview of things that influence materials as you 
> described.
>
> My experience is that what you have described is not unusual. Some 
> materials
> have reduced reliability after three thermal excursions to 260°C. In this 
> case
> you are increasing the temperature to 288°C although it is only for 10 
> seconds.
> If you have a sequential lamination process you may be at the materials 
> limit
> particularly if this is for a lead-free application.
>
> I believe that the number of lamination cycles can degrade the dielectric. 
> I
> doubt that plating, hole prep or drilling will be significantly 
> influential.
> HASL or fused surface finishes will degrade material.
>
> The expected failure modes are adhesive delamination or cohesive failure 
> for the
> dielectric and barrel cracks or knee cracks in copper. You may not find 
> the
> copper cracks as they will be small and randomly distributed in the sample
> particularly if you are reviewing a few PTHs.
>
> If you are going to IPC I will be proposing a test method called Cyclic 
> T260
> that would help shed light on this problem. It is a TMA based method that
> measures the degradation of material after thermal cycles to simulate 
> assembly
> and rework. I say degradation of material but it would be better to 
> describe
> this failure as the degradation of material that has been through 
> fabrication
> including the influence of construction, fabrication and design. You see I 
> find
> that the copper quality, material robustness, design influences and 
> fabrication
> variables (like lamination, oxide coating, surface finish) conspire to 
> provide a
> given level of reliability. I will be presenting this at the C-10C PTV
> Reliability-Accelerated Test Methods Task Group on Wednesday April 7th at 
> 10:15
> am. I hope that those available will join us at the meeting and support
> investigating this test method. Anyone interested in PWB reliability is
> encouraged to join us at the Wednesday Meeting. I am looking forward to 
> critical
> comment and hopefully support.
>
> I do not know if there is a conference call capability planned for that 
> meeting.
> You could contact IPC is see if that could be arranged. Some times the 
> size of
> the room makes conference calling problematic.
>
>
> Sincerely,
> Paul Reid
>
> Program Coordinator
> PWB Interconnect Solutions Inc.
> 235 Stafford Rd., West, Unit 103
> Nepean, Ontario
> Canada, K2H 9C1
> 613 596 4244 ext. 229
> Skype paul_reid_pwb
> [log in to unmask] <mailto:[log in to unmask]>
>
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]] On Behalf Of Pradeep Menon
> Sent: April 2, 2010 2:11 AM
> To: [log in to unmask]
> Subject: [TN] Outer layer separation
> Importance: High
>
> Dear all,
>
> Wanted some inputs on a problem which we are facing currently
>
> We observe a separation, rather tendency for separation, on 2.5mm thick
> MLB boards when subjected to 3X 288 deg 10 sec thermal stress. This is
> mostly found only on one side ie in one of the outerlayers, and very few
> on both outer layers. The inner layers are intact.
>
> We use N4000-6 as well as 4000-13EP laminates for fabricating PCBs and we
> use laminate construction for the stack up. We do Plasma desmear followed
> by a run thru permanganate too. We tried various parameters in drilling as
> well as reviewed all the basic electroless / electroplating parameters ,
> and all were found as desired.
>
> We use 1-1.2 microns thick electroless copper followed by a flash
> electrolplated copper of about 12 microns before pattern printing. The
> board is then pattern plated to achieve a minimum PTH copper of 30
> microns.
>
> Looking forward fro ur inputs
>
> Rgds
>
> Pradeep
>
>
>
>
>
>
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