Subject: | |
From: | |
Date: | 27 Jul 96 12:43:59 -800 |
Content-Type: | text/plain |
Parts/Attachments: |
|
|
>We are having a significant problem with quickturn cards coming
>in overetched, and we're trying to understand some things about
>the process of etching.
> One question that has come up is: Is it possible for
> etching to be greater in one area of the card over another?
> If so, how is this >possible, and what are the design
> considerations for this? Some here contend that every
> feature should etch down by the same nominal amount, say
> .002 inch, whether the feature is an .008 trace or a large
> ground plane, since the whole PCB is exposed to etchant at the
> same time. Is there fault in this thinking ?
Even etching across the panel requires close attention to the
process variables (spray pressures, temperature, chemistry). Many
companies run a test panel of bare copper to check for even
etching on a daily or shift schedule in addition to all the
other checks. On a large card even etching definitely needs to be
watched.
Design considerations are:
-Use the thinnest copper foil call out you can down to half
ounce.
-Try not to use 'isolated' copper features with nothing
around them. They can over-etch.
-Lines parallel to the board edges work better.
-In general finer lines are easier to make than fine spaces. I'd
rather have a 4 mil line with a five mil space than a 5 mil line
with a 4 mil space. Above 6 mil line and spaces most operations
don't have an issue with this.
[log in to unmask]
Hallmark Circuits Inc.
San Diego, Ca.
***************************************************************************
* TechNet mail list is provided as a service by IPC using SmartList v3.05 *
***************************************************************************
* To unsubscribe from this list at any time, send a message to: *
* [log in to unmask] with <subject: unsubscribe> and no text. *
***************************************************************************
|
|
|