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June 2009

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Subject:
From:
Syed Ahmad <[log in to unmask]>
Reply To:
TechNet E-Mail Forum <[log in to unmask]>, Syed Ahmad <[log in to unmask]>
Date:
Thu, 4 Jun 2009 12:45:48 -0500
Content-Type:
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text/plain (124 lines)
Does CSP include flip chip? There is a chance of chip edge cracking
resulting in malfunction if the underfill does not cover the whole front of
the flip chip. Same could apply to other devices depending upon the line
thickness and distance from the edge.

Do we really need at least 50% coverage of sides? Won't 25% (or 10% or
"needs to be above the edge") do? For thin packages, a 50% requirement may
lead to an easy rise above the device.

Void size probably should be specified with respect to the pitch of the
part. With pitches getting smaller, half a mm may be too much for some
parts.

Is any acoustic microscopy considered for voids not optically visible?

-----Original Message-----
From: TechNet [mailto:[log in to unmask]] On Behalf Of Bev Christian
Sent: Thursday, June 04, 2009 10:07 AM
To: [log in to unmask]
Subject: [TN] Underfill Workmanship Pass/fail Criteria Proposal

TechNetters,
OK after speaking to a couple of industry friends, this is what we have
come up with. I will leave it to them to speak up and identify
themselves, if they wish.  I have written this up in IPC-A-610 format
and have tried to cover all situations for Class 2 and 3 products in
particular.  

If we can nail this, I would like to present this to the IPC as the
first IPC draft doc essentially hammered out by out TechNet community.

Comments readily accepted!
Bev
RIM


Workmanship Standards for BGA and CSP Underfills

Target - Class 1,2,3
*	Component requiring underfill completely underfilled with a good
fillet all the way around, the fillet just approaching the maximum
component body height, completely cured, no encroachment onto other
components and no voiding whatsoever

Acceptable - Class 3
*	At least 50% fillet height up the side of the component body

*	Small pin holes and voids are permissible provided they do not
exceed 5% of fillet surface area and have a maximum diameter of 0.5 mm
(0.020 inches).

Acceptable - Class 1,2
*	Component requiring underfill underfilled such that all balls
are covered, but no evidence of an exterior fillet, no encroachment onto
other components and no voiding whatsoever

*	Component requiring underfill underfilled such that all balls
are covered, with or without an exterior fillet, no encroachment onto
other components and only small voids, not touching any solder joints

*	Component requiring underfill underfilled such that all balls
are covered, with or without an exterior fillet, no encroachment onto
other components and even large voiding, but not touching any solder
joints

*	A void or voids less than or equal to 50% around the perimeter
of one or more solder joints

Defect - Class 1,2,3
*	Underfill completely missing from components where it is
required

*	Underfill not completely covering all the peripheral solder
joints

*	Voiding such that a void traverses the distance between two or
more solder joints under the array device requiring underfill

*	A void or voids more than 50% around the perimeter of one or
more solder joints

*	Material extending on to the top of the BGA or CSP

*	Uncured material

Special Conditions - Class 1,2
*	Encroachment onto other components, but meeting all other
criteria above for target or acceptable conditions will be dealt with as
a pass/fail on a case-by-case basis

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