Hi technetters,,

Firstly, I'm carrying out reseach to find a low cost, flat substrate. The
flatness of the substrate is critical as the PWA will be surface mountable onto
a customer's PWB. Would anyone have information on the follwowing:
   PWB flatness specs. using large SMT devices (typically 2"x1"x0.5").
   PWB warpage models.
   B stage laminate specifications for flat PWBs (ie thread count/inch, resin
   type, weave pattern, etc)
   What material is used in BGA devices with FR-? substrates and what is the
   flatness specification.

Secondly, I see by the archives that bow and twist is old hat to most of you but
I'm a 'flatness' beginner and I need your help regarding interpretation of
IPC-TM-650 Number 2.4.22.
Adhering to IPC 2221, I calculated the expected worse case bow on a 7" long
panel to be 0.053" (ie, 0.75% of 7"). The panel contains 12 circuits, 2" in
length. Using trigonometry I expect the maximum bow in each circuit to be
0.004".

Could a panel bow more than once while still having all 4 corners in the same
plane. For instance it could be concave then convex then concave  and so on like
a sine wave. Should the 2.4.22 test method still be used or should the board be
rejected. And if so, on what grounds?



Thanks in advance,
Brian Gaynor
PCB Designer
Artesyn Technologies
Ireland.

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