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August 1999

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Subject:
From:
Sunil Gupta <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 20 Aug 1999 09:31:15 +0530
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text/plain (78 lines)
Hi Grant,

The better thing would be to use very low solids flux (about 2%) and it
would solve the problem of testebility.

regards

Sunil Gupta
Tata Telecom Ltd.




Grant Emandien <[log in to unmask]> on 19-08-99 19:48:25

Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
      to Grant Emandien <[log in to unmask]>

To:   [log in to unmask]
cc:    (bcc: Sunil Gupta/TTL)
Subject:  [TN] Solder joint curing




Hi all out there,

What is the average period for a solder joint (reflow and wave) to 'cure'?
I
also state that I don't quite know what cure means in this instant - but
the
general problem we have is the minimum period (if there is such a thing!)
required for a solder joint to cure before introducing it to ICT under
reasonable conditions of stability.

Our test guys are complaining that the assemblies reach there machines too
late (hours later), resulting in hardened flux which the test pins have
difficulty in penetrating, causing damaged pins, retesting and hence
unnecessary wear of the test fixtures and reduction in throughput.
Introducing the assemblies too early while the joints are still in
'transition' may also result in retesting (true or false?).

As you may have guessed, we don't clean boards as a norm however, this may
be the way to go in future as will be experimenting with a cleaner shortly.

Cheers
Grant

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