I agree with Pratap in his assessment that the barrel cracking is 
because of the difference in thermal expansion rates of the 
material and copper in the Z-axis.  I hope to add a little more 
detail around the CTE issue that I'm sure Pratap knew but chose to 
leave out for fear of boring you all.  So if you are happy with 
Pratap's response, there is still time to stop reading and delete 
this message now before you get sucked in.

I would suspect the expansion as the cause for cracking before the 
quality of plating and far before the soldermask in the holes.  
The reason I wouldn't first suspect the plating quality is because 
generally most shops are going to have good plated hole quality if 
they monitor it at all.  The soldermask will also blow out of the 
holes before building up enough force to crack the barrel of the 
hole.

There are a few things that impact the reliability of the plated 
holes due to CTE issues:

1.  Tg (glass transition temperature).  Using a higher Tg FR4 will 
put less stress on the barrel.  FR4 expands more above the Tg than 
below it so if the temperature difference between the Tg and 
solder temperature is minimized, it will increase the reliability.

2.  Thickness.  You shouldn't have to worry about barrel cracking 
due to CTE mismatch if the thickness is less than about .093" for 
high layer count boards and less than about .150" for low layer 
count boards.  (See next item for explanation)

3.  Resin content.  FR4 is a composite material of glass fabric 
and epoxy resin.  The resin expands much faster than the glass 
during a temperature rise.  The problem comes up when you are 
trying to pack many layers into a thick board.  To do this you 
need to use thinner prepregs which have higher resin content (1080 
and 106 style glass).  Lower layer count boards use mostly thicker 
prepregs with lower resin content (2116 and 7628 style glass).

FYI:  7628 is about .007" thick, 2116 is about .005" thick, 1080 
is about .003" thick, and 106 is about .002" thick.  And I believe 
it is still required by IPC 276 to have a minimum of 2 sheets of 
prepreg between layers.

If you can't change items 1-3, then your last resort is to keep 
the non-functional pads on all layers and plate the bejesers out 
of it (make a rivet).


Darren Hitchcock
Merix Corporation
[log in to unmask]

--------------------------------
[log in to unmask] Wrote:
| 
| Roger, the via or PTH cracking is due to differential 
| expansion of plated copper and FR-4 material.     
| CTE of copper -- 1.6 to 1.7 x 10*-5 per deg C
|        FR-4   --  >= 40x10*-5 per deg C above its 
| glass transition (110 degC). The expansion for FR-4 
| goes exponential above it's TG. The increase in length
| being directly propoetional to temperature, copper is 
| going to be stretched by a factor of 2.2 X.
| The stress is therefore great and will exceed its 
| tensile value, thereby cracking it. At 270 deg C, 
| expansion is almost twice that at 125 deg C.
| 
| When thermal cycle (-65 to +125 C) is used fatigue 
| becomes dominant factor for via cracking and will 
| take few cycles before failure takes place. Also
| the thicker the board, greater the chance of cracking 
| in the via.
| 
| Pratap Singh
| RAMP Labs
| (512) 255-6820 
| 

--------------------------------------------------
[[log in to unmask]] wrote:
||
||  To TechNet,
||     
|| I have had a problem with a sample PCB evaluation and 
|| I hope someone can help me with some supporting data.
|| The problem is that the evaluation board had a shear 
|| crack in the barrel of a 12mil small via hole after 
|| 100 cycles of thermal shock.  What we discovered is 
|| that the hole had been plugged on both sides with 
|| soldermask (not my idea).  We feel like the expansion 
|| of the trapped air eventually caused the barrel to 
|| shear.  What I need is some confirming data to show 
|| that the theory is correct.
||     
|| In the past, we had some boards which were plugged 
|| on both sides with mask (but not thermal shocked).  
|| The resultant after reflow was that one side of the 
|| plug popped (outgassing) and that the barrel did not 
|| crack.  Was the difference in resultants due to the 
|| cycling at lower temperature (-65C ~ +125C) vs. 
|| short term exposure at high temp (270C for ~7 secs.)?
||
|| Any opinions or sources of data would be greatly 
|| appreciated.  Thanks in advance for all your responses.
||
||     Roger Held
||     Hitachi Computer Products (America), Inc.
||     [log in to unmask]
||     (405) 360-5500 x142