Matthew,
I'll second what Adam mentioned below. It's often times a big guessing
game we play. There are a few trick you can play though, but it's still a
"take your chances" playfield.
1) Rule #1: Have some years of design experience. If you don't, don't
play the game. (Just kidding)
1) Break down all your design activities into catagories you'll be able to
account time to. (e.g. BOM/schematic review time; symbols creation
(schematic and/or layout); component placement; fanouts/pin escapes;
hand routing; review and corrections; autorouting; cleanup;
manufacturing output; archival.
2) Be aware of your customer's (engineer's) design guidelines. Often
times how the engineer "wishes" his board to be done. If they don't have
any, be very careful. Press them for as many "design details" as
possible up front, BEFORE YOU START!
3) Know your customer/engineer. If you've had experience with
them/him great, it helps. But there is always some time delays in
understanding what exactly they want done. Often time the engineers
personality willl account for some time.
4) add MINIMUM 10% to total time determined.
When you begin to breakdown your activities and times you'll start
understanding what you've been guessing at all this time. It really does
help. But there is no easy way, and you'll still only be right about 50% of
the time, but your loses won't be as great.
Good luck,
Mitch Morey
Sr PCB Designer
San Diego, CA
>>> "Hawes, Adam" <[log in to unmask]> 08/28/98 01:08am
>>>
This is a subject close to my own heart. Myself and my colleague often
get
hassled to put a time on a particular job and we have a decision to make
-
tie yourself to a date and be responsible for any failiure to meet
deadlines
or over estimate and stand the chance of other less knowledgeable
people
jumping to conclusions about your abilities as a PCB layout engineer!
Seven times out of ten the "over estimate" turns out to be a more realistic
estimate than at first thought. So, more often than not, it turns into a
game of chance. Not a particularly favourable situation.
Any, more experienced designers', input/advice on estimating job
duration
would be a Godsend.....!
> -----Original Message-----
> From: Matthias Mansfeld [SMTP:[log in to unmask]]
> Sent: Thursday, August 27, 1998 4:52 PM
> To: [log in to unmask]
> Subject: [DC] How to estimate the time and place needed for a
layout?
>
> help.....
> Dear colleagues,
>
> I just work at a layout that is one of these layouts which
> need much much more time and trouble than initially
> estimated. I hope I'm not the only one who knows this problem.
>
> My question is: Are there any good thumb rules for a good estimate in
> advance how long it takes to make a layout for a given schematic/
> partlist/ mechanical constraints drawing and how many layers are
> necessary? I get usually a schematic and mostly a partlist and with
> these informations I must make a good estimate for my customer how
> much time it will take and (depends on time indirectly) how much cash
> I want. The customers want the estimate ASAP, that means, I have not
> much time to check out placement/routing density, the necessary
number
> of layers etc. And later it ends up with two layers more than the
> customer wants to pay for and a lot of unplanned, unpaid night
> sessions on my layout PC to get it ready in time or only few days
> late.
>
> There are in IPC-2221 3.6.2 "Feasability Density Evaluation" (old
> IPC-D-275 : 5.1.1) some calculations based on the size of the parts.
> Is this good usable for determining how much routing area
> is available? Has anybody any additional thumb
> rules which consider e.g. the electrical structure
> (many address/data buses across the board or only analog circuits
with
> mostly short point-to-point connections) or SMD parts pitch (can I
> route between the leads or is the top layer really blocked by 0.5mm
> pitch rows, as it is now with my actual nightmare layout - customer
> wants 4 layers only with two of them Vcc and GND planes and no
routing
> - thus I have in reality only one and a half layers effectively for
> routing :-( )?
>
> My dream would be an easy formula which says exactly, how routable
is
> the board, how many layers are necessary , and how much time/cash
> needs the layout.
>
> Thanks, regards
> Matthias Mansfeld
> -----------------------------------------------
> Matthias Mansfeld Elektronik
> * Leiterplattenlayout, Bestueckung
> Am Langhoelzl 11, 85540 Haar; Tel.: 089/4620 093-7, Fax: -8
> Internet: http://home.t-online.de/home/matthias.mansfeld
>
>
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