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1996

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Subject:
Re: Controlled Impedance
From:
Lisa Williams <[log in to unmask]>
Date:
Fri, 12 Apr 1996 10:08:09 -0500 (CDT)
Content-Type:
TEXT/PLAIN
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TEXT/PLAIN (35 lines) 
Larry,

IPC-2141, Controlled Impedance Circuit Boards and High Speed Logic 
Design, which is currently being printed, references Test Method 2.5.5.7, 
Characteristic Impedance and Time Delay of Lines on Printed boards by 
TDR.  It is included in the IPC-TM-650, Test Methods Manual.

****************************************
Lisa M. Williams
Technical Staff
IPC
2215 Sanders Road
Northbrook, IL 60062
phone: (847) 509-9700 x 379
fax:   (847) 509-9798
email: [log in to unmask]
****************************************



On Thu, 11 Apr 1996, LARRY A. STERNIG wrote:

>  .int [log in to unmask]
> 
>  Does IPC have a standard for Controlled Impedance Testing.
>  Something on the order of IPC-TM-650 to define how
>  TDR measurments are made not how to design for controlled impedance.
> 
>  Larry Sternig
>  [log in to unmask]
> 
>

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