Try IPC-D-317A, IEC 326-3 or IPC-2141.
Best regards,
Andy
>Date: Fri, 21 Aug 1998 09:11:42 +0100
>To: "Polar Instruments, Inc." <[log in to unmask]>
>From: Gwen Merchant <[log in to unmask]>
>Subject: FOR INFO ONLY Fwd: Re: [TN] More Controlled Impedance
>>Date: Thu, 20 Aug 1998 09:49:07 -0700
>>Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
>> [log in to unmask]
>>Sender: TechNet <[log in to unmask]>
>>From: [log in to unmask]
>>Subject: Re: [TN] More Controlled Impedance
>>To: [log in to unmask]
>>
>>The engineer should have some general idea of how he or she wants the
stackup
>>configured with respect to ground and power planes, and signal layers. Those
>>considerations are important for shielding, propagation delay, etc. The
>>engineer should also know what impedances and tolerances are needed on each
>>signal layer.
>>
>>I would suggest then preparing a sketch or table of the proposed stackup and
>>impedances and giving it to one or more of the potential pcb fabrication
shops.
>>They will be able to determine the detailed stackup in terms of core
>>thicknesses and prepregs as well as trace widths that should be used. Of
>>course, different shops will provide slightly different answers; but, you
>>should be able to either determine a good compromise or just specify the
>>impedances to the chosen fabricator and let them be responsible for
hitting the
>>target impedance.
>>
>>An example stackup table to provide the pcb fabricator could look like:
>>
>>Layer 1 signal 80 ohms
>>Layer 2 GND
>>Layer 3 signal 65 ohms
>>Layer 4 signal 65 ohms
>>Layer 5 GND
>>Layer 6 Vcc
>>Layer 7 signal 65 ohms
>>Layer 8 signal 65 ohms
>>Layer 9 GND
>>Layer 10 Signal 80 ohms
>>
>>Regards,
>>
>>Denis Mori
>>Hewlett-Packard Company
>>NPSD
>>Roseville, CA
>>_______________________________________________________________________
>>I am currently testing a new e-mail client called Outlook.
>>If present, please disregard the "winmail.dat" attachment.
>>_______________________________________________________________________
At 09:17 AM 21/08/98 +0100, you wrote:
>>Date: Fri, 21 Aug 1998 09:13:04 +0100
>>To: "Polar Instruments, Inc." <[log in to unmask]>
>>From: Gwen Merchant <[log in to unmask]>
>>Subject: FOR INFO ONLY Fwd: Re: [TN] More Controlled Impedance
>>>Date: Thu, 20 Aug 1998 14:31:53 -0400
>>>Reply-To: "TechNet E-Mail Forum." <[log in to unmask]>,
>>> "McGlaughlin, Jeffrey A" <[log in to unmask]>
>>>Sender: TechNet <[log in to unmask]>
>>>From: "McGlaughlin, Jeffrey A" <[log in to unmask]>
>>>Subject: Re: [TN] More Controlled Impedance
>>>To: [log in to unmask]
>>>
>>>Cameron -
>>>
>>>Things you need to know going in to a controlled impedance circuit board
>>>include:
>>>
>>>1.) The effective frequency of the signals to be impedance matched.
>>>Don't try control impedance on a global basis the head and heart aches
>>>aren't worth it. The effective frequency can be calculated as F in Hz
>>>=0.35/Signal rise time in nsec.
>>>2.) The target impedance for the lines in question. For FR4 the
>>>practical range is around 30-100 ohms anything outside that range will
>>>require a material change.
>>>3.) The relative Permittivity(sp?) of the substrate being used. For FR4
>>>it will be between 3.8 and 4.5 depending on Frequency.
>>>4.) Layer stack-up. This is critical in controlled impedance.
>>>5.) Critical Length for the controlled impedance lines.
>>>Calculate as Critical Length in inches = [(Trise * Speed of
>>>light(inches/sec))/sqrt (Er)]/2.
>>>
>>>Don't be surprised, however if the engineer gets a puzzled look when you
ask
>>>for the rise time, and is a long time getting back to you with it.
>>>
>>>This is where the real fun of PCB design starts >:->
>>>
>>>Jeffrey A. McGlaughlin
>>>Printed Circuit Board Designer
>>>Battelle Memorial Institute
>>>Columbus Ohio
>>>
>>> -----Original Message-----
>>> From: [log in to unmask] [SMTP:[log in to unmask]]
>>> Sent: Thursday, August 20, 1998 10:35 AM
>>> To: [log in to unmask]
>>> Subject: [TN] More Controlled Impedance
>>>
>>> Thanks to those who responded to my previous question about
trying
>>>to find some information about how to design a board with controlled
>>>impedance. Unfortuneatly, I still haven't been able to find any
information
>>>on the topic.
>>> I now have an engineer who wants me to design his board with some
>>>controlled impedance. Can anyone tell me what questions I should ask him,
>>>and give me some design considerations that I should pay attention to.
>>> Thanks,
>>>
>>> Cameron
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Best regards
Andy Burkhardt <[log in to unmask]>
Tel: + 44 1481 253081
Fax: + 44 1481 252476
http://www.polar.co.uk
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World leaders in PCB faultfinding and controlled impedance measurement
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