> We are struggling with the interpretation of IPC-D-275 paragraph 5.3.1.5.
> One group is arguing that this paragraph discussing cross-hatched areas only
> applies to external layers and the other group feels that it should apply to
> all layers.
> 

Kenny,

I've only heard of problems dealing with these "shape-filled" on the external
layers. AND, I've only experienced a "cosmetically improper" pcb when it had
EXPOSED copper on the external layers that the tin-lead plating had a "bubbly"
finish. When the exernal layers have a soldermask coverlayer they don't tend
to have ANY problems. The "bubbly" finish was more caused by a "less-than-
preferred-quality" fabrication house.

With respect to bow and twist, we don't tend to attribute that to large copper
areas on the external layers, more to how the layer stack-up is constructed.
If there is an uneven stack-up (power/gnd planes, prepreg and core construction
is not balanced) it could attribute to bowed boards. And, if the stack-up
material has not been "cured" properly or stored in a controlled area prior to 
lamination it WILL bow or twist. But, BEWARE, I have been to the fab house and
have watched a shipping clerk "unbow" a bare pcb prior to shipping. There are
somethings you just cannot control!

We do 6-14 layer board with "covered", large copper areas on the component
and solder sides, and solid plane layers (internal) with NO problems, but we
are extremely sensitive to the layer stack-up.

A second concern, you need to be aware of is not to run a copper area to the
edge on the external layers. I can almost guarantee you the copper will "peel"
after the board is routed from the panel. This, we have experienced. On the
internal layers, this hasn't cause us a problem, BUT we don't EVER run the 
voltage layers to the edge.

Hope this helps,

Mitch Morey
Sr. PCB Designer
TRW, Inc.
Redondo Beach, CA 90278
Phone: (310)814-5765
Fax:   (310)812-4949
EMAIL: [log in to unmask]

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     PCB layout is like fine art. You have to DIE to be famous!
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