On Tue, 9 Apr 1996 [log in to unmask] wrote:

>      
>      Does anyone know of the origin/derivation of the charts in Figure 3-4 
>      of IPC-D-275?
> 
> 

John,
The following information was provided to another inquistor on the same 
subject. It was posted on earlier in February. It will be sent in two 
parts again.

Hope this helps.

****************************************
Lisa M. Williams
Technical Staff
IPC
2215 Sanders Road
Northbrook, IL 60062
phone: (847) 509-9700 x 379
fax:   (847) 509-9798
email: [log in to unmask]
****************************************



Dave -- 

You queried, "I have a customer who has asked what is the required spacing on
both innerlayers and outerlayers for 1500 VAC (~2100 VDC). Outerlayers have
dryfilm soldermask covering them. I looked up IPC-D-275 and have referenced
the data from Table 3-1. This customer feels these values are extremely
conservative and is curious if other designers are using that criteria
rigidly?"

First I appoligize to all for the length of this response, without a doubt, it
probably contains stuff you would love/like to live without. But with the
industry going to greater applied electrical stress to insulative materials
and the trend for industry design/manufacturing standards - I felt the
information would be of value to the majority of you "techneters".

Due to the length of this creation, it couldn't be sent in one chunk, I'm not
sure if technet handles "enclosures", sor I'm sending this in two chunks, Part
1 and Part 2.

HISTORY - The current Table 3-1 in the IPC's-D-275 was developed by a Task
Group chaired by Charlie Jennings of Sandia National Laboratories
(Albuquerque) back in the late 70's (if memory is correct). The Table is a
composite of the electrical testing he performed at Sandia, and by some other
member companies. In addition, there was a significant electrical testing
program that was being conducted in Europe (I believe West Germany). The
european effort (as I recall) covered electrical spacing, insulation
resistance, current carrying capacity, and environmental testing. What the
IPC's Task Group did was to perform some testing to obtain correlation with
the european effort and to conduct some additional testing for a more complete
test matrix. The environmental testing included various levels of cleaning
and various operating environments, such as ocean front (salty atmosphere),
busy street corners (vehicle exhaust and factory contamination). All-in-all,
it was a good test that resulted in good test data/results.

Now to you query / problem

THE RULES/LAWS OF MOTHER NATURE

First, the following is based on "STP" (standard atmospheric temperature and
pressure). According to one of the laws of physics, gasses will ionize and
breakdown according to Paschen's Law, which is a complex function relating at
least the test anode geometry, the gas (density), properties of the gas
itself, gas pressure, temperature, and electrical spacing; to identify a few. 
For brevity, we will focus on"air" at STP (-20 degrees Celsius and 750 mm Hg),
and assume low humidity.

The minimum breakdown voltage for air at STP is 250 Vac RMS (or 350 Vdc) and
occurs at an electrical spacing (for near perfect rounded surface electrodes)
of 7.6 micrometers [0.003 inch or 0.3 mils]. The approx. breakdown spacing for
other voltages are as follows (and are the composite of several authors) and 
the equivalent electrical field stress in V/mil(inch):

~Vdc or
ac (peak) 350 470 630 1100 1600 2700 5400 

Spacing (mils) 0.3 1 2 5 10 20 50 

V/mil 120 470 315 220 160 130 108 

NOTE: These values are the breakdown voltage of air and should not be
confused to the "corona" ionizaton potential (which is about 55 Vac, RMS /
mil).

The key point about the application of Paschen's Law/curve is that as long as
your applied voltage is less than about 250 Vac RMS or 350 Vdc (or ac peak),
as a rule-of-thumb, you should never have an electrical breakdown with an
electrical spacing greater than 8 micrometers, or if the electrical field
stress is less than ~100 Vdc/mil under absolutely perfect conditions. But you
will/may have corona at higher voltages.

IPC's IPC-D-275 electrical Conductor Spacing Table 3-1 "Suggested" Design
Requirements:

The following is a conversion of the Table 3-1 into the type of printed board,
applied voltage-spacing and equivalent electrical field stress in the form of
"uniform voltage gradients".

________ Tabled Voltage, Vdc / Conductor Spacing, mils (inch) ___________
Type of PB for voltages = and > 100

B1 (internal conductors) 100/4 150/8 170/8 250/8 300/8 500/10 >500
Vdc/mil 25/1 19/1 21/1 31/8 38/1 50/1 10/1

B2 (uncoated external) 100/25 150/25 170/50 250/50 300/50 500/100 >500
Vdc/mil 4/1 6/1 ~3.5/1 5/1 6/1 5/1 5/1

B4 (Polymeric coated) 100/5 150/15 170/15 250/15 300/15 500/30 >500
Vdc/mil 20/1 10/1 ~11/1 ~17/1 20/1 ~17/1 ~8/1


As can be seen in the table, for B1 PB's (embedded or internal conductors) the
electrical field stress is less than 50 Vdc/mil for all applications. For B2
PB's (uncoated surface conductive patterns, and altitude less than 10k ft) the
electrical field stress is less than 6 Vdc/mil. And for type B4 (polymeric
coated) PB's, the electrical field stress is less than 20 Vdc/mil.


BASE MATERIAL REQUIREMENTS:

The electrical characteristics of PB base materials are tested in two ways,
one is Dielectric Breakdown (which is parallel to the base material
laminations) per IPC-TM-650, Method 2.5.9 or ASTM D-299 and D-149, and the
material requirements for epoxy-glass laminates is about 50 Vac/mil. The
second is Dielectric Strength which is perpendicular to the laminations in the
base material per IPC-TM-650, Method 2.5.6.2 or ASTM D-149 and the reqirements
for epoxy-glass laminates is about 500 Vac/mil. 

Part 2 is another e-mailing -- sorry about that.

Ralph Hersey
Lawrence Livermore National Laboratory
Phn: 510.422.7430
FAX: 510.424.6886
e-mail: