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October 2004

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Subject:
Re: Td questions
From:
MA/NY DDave <[log in to unmask]>
Reply To:
(Leadfree Electronics Assembly Forum)
Date:
Wed, 20 Oct 2004 23:32:50 -0500
Content-Type:
text/plain
Parts/Attachments:
text/plain (20 lines) 
Hi Again Werner, and IPC LF Listservers,

Cookson/Polyclad Ed Kelley gave a good paper on laminates and Td at 2004's
APEX yet it didn't give what you asked which is failure modes to expect
with lower Td's.

JEDEC, and the IPC, have some work on MSL level upgrading so that might be
useful to you on the component side.

Yours in Engineering, Dave
YiEngr, MA/NY DDave

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