I have one customer that violates 2221 recommended conductor to edge
spacing on 20% of their designs. They have amended their procurement
documentation to allow haloing that exceeds the current IPC criteria if
their design places the conductor closer than .!00" from the edge. It is
their responsibility to review the electrical issues. And we all know that
the condition is going to get worse as we move to new materials for
lead-free. They fracture much easier.
Tom Kemp
Rockwell Collins Printed Circuits
Jack Olson <[log in to unmask]>
Sent by: IPC-600-6012 <[log in to unmask]>
12/11/2009 10:00 AM
Please respond to
"(Combined Forum of D-33a and 7-31a Subcommittees)" <[log in to unmask]>
To
[log in to unmask]
cc
Subject
Re: [IPC-600-6012] FAB: Acceptability of Haloing
OK, thanks for all the responses.
For the record, I think the comment was submitted
by someone who was fabricating boards with edge
fingers, and the 50% rule was giving them trouble.
We have another conference call next week,
and I will forward your advice
appreciate your help...
Jack
.
On Fri, Dec 11, 2009 at 8:28 AM, Mike Hill
<[log in to unmask]>wrote:
> Agree fabricators must push back when they see conductors near a routed
or
> drilled edge.
>
> I have attached a real life example I had yesterday (Ipc-6012 class 3A
> board) The conductor is 2 mils from a NPTH on polyimide material.
Ergo:
> max halo is 1 mil.... I asked that all such conductors be shaved or
moved
> to provide at least 15 mils and the customer agreed.
>
> Mike Hill
>
> -----Original Message-----
> From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Jack Olson
> Sent: Wednesday, December 09, 2009 7:05 PM
> To: [log in to unmask]
> Subject: Re: [IPC-600-6012] FAB: Acceptability of Haloing
>
> but people are putting planes 4-5 mils from the board edge now.
> Is 2mil of haloing really drastic enough to review?
>
> Or from the other side of the coin, any fabricator who sees that
> a designer has put conductors that close should immediately put
> the job "ON HOLD" for review until implications are discussed?
>
> I'm not disagreeing with you, but that's the problem...
>
> Jack
>
> On Wed, Dec 9, 2009 at 5:55 PM, Gandhi, Mahendra S (AS) <
> [log in to unmask]> wrote:
>
> > All Haloing condition must be reviewed with electrical design
activities
> > to make a decision of acceptance when it is over 50% from edge to
> > conductor.
> >
> > Mahendra
> >
> > -----Original Message-----
> > From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Jack
Olson
> > Sent: Wednesday, December 09, 2009 2:24 PM
> > To: [log in to unmask]
> > Subject: [IPC-600-6012] FAB: Acceptability of Haloing
> >
> > Fabricators,
> >
> > This is an opportunity to influence the acceptability of your product!
> >
> > The IPC Standards Development Committee is working on the next
> > revision to IPC-A-600 (Acceptability of Printed Boards) which is a
> > visual reference companion to IPC-6012.
> >
> > One of the items we are currently discussing is the acceptability of
> > haloing along the board edge. Here is a link to where we stand now:
> >
> > http://frontdoor.biz/PCBportal/IPC-A-600H213.jpg
> >
> > The problem is, if the designer violates the recommendation in the
> > current IPC-2221 design guideline and puts traces or planes too close
> > to the board outline, with the current wording of "whichever is less"
> > your boards can be considered rejectable with even a very small
> > amount of haloing. Even intentional features like edge fingers can
> > make your boards rejectable.
> >
> > We aren't sure if we should reword this (and if so, how?)
> >
> > So the ball is in your court (because unless there is a logical
> > consensus
> > we probably won't change it).
> > I'll compile and submit any responses to the next committee meeting.
> >
> > Jack (aka "the new guy")
> >
>
|
