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From: | |
Reply To: | (Combined Forum of D-33a and 7-31a Subcommittees) |
Date: | Thu, 15 Dec 2011 08:52:27 -0500 |
Content-Type: | text/plain |
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Joey,
In my opinion the haloing criteria is not applicable in this case;
because the design allowed copper to go to the edge of the board. The
fabricator should not suffer the penalties of a questionable design
practice. (Ok, please don't shoot me for this shot at the designer but
the copper should be pulled back from the edge of the board)
So, I would evaluate this as a non-defined criteria and do an
engineering analysis of whether there will be a performance/reliability
issue with this condition.
Having said this, I don't see any haloing under the pad - just because
you see haloing next to the pad doesn't mean it's present under the pad.
Just my 2 cents worth,
Pete
-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Jose A
Rios
Sent: Thursday, December 15, 2011 12:09 AM
To: [log in to unmask]
Subject: [IPC-600-6012] haloing
wondering how others interpret the applicability of 6012c 3.3.1 (and its
6018 equivalent) with respect to haloing, for designs that have metal to
the edge of a pwb, as shown below?? conductor to conductor spacing is
highly compliant, distance from the solder feature to the first halo
along the edge is less than 4 mils.
to me 3.3.1 has a context where metal is away from the board edge by
design, unlike the attached image.....
Joey Rios
PWB & Process Quality Eng'r
Endicott Interconnect Technologies
1093 Clark St.
Endicott, NY 13760
Office: 607-755-5896
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