IPC-600-6012 Archives

May 2014

IPC-600-6012@IPC.ORG

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Subject:
From:
Gary Roper <[log in to unmask]>
Reply To:
(Combined Forum of D-33a and 7-31a Subcommittees)
Date:
Thu, 29 May 2014 20:47:18 -0500
Content-Type:
text/plain
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text/plain (55 lines)
Brad,
I thought it was defined but I agree it is not. I'm a IPC Master trainer for
610 and J001. If you don't mind me using your picture in class I'll ask what
participants would do with them.


Have a great day,

Gary C. Roper, MA, CQA, MIT
President, Roper Resources, Inc.
Master IPC Trainer, Blackfox Training Institute, LLC
www.roper-resources.com
cell: 214-505-6800



-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Brad Toone
Sent: Thursday, May 22, 2014 4:53 PM
To: [log in to unmask]
Subject: [IPC-600-6012] Plating nodules on SMT pads

I have a question regarding plating nodules on SMT pads.  Searching through
IPC 600 and 6012, the only place I can find anything regarding acceptance
criteria for nodules is when it is mentioned in reference to thru holes and
in reference to wire bond pads.  

IPC 6012 talks about defects on in a surface pad but only mentions "Defects
such as nicks, dents and pin holes" in section 3.5.4.2.1 Rectangular Surface
Mount Lands.  These are all void type defects, no mention of nodules.  

Any input on acceptability criteria of nodules on SMT pads?  Should IPC
address this?  How would it be defined?  

Historically, we have accepted nodules up to .002 in tall and if they are
not in a BGA area or on fine pitch components that we feel would be a solder
risk.  I just want to see what others are doing.  See the attached for an
example, the nodules in this case are .0013 tall.

Thanks,
Brad Toone
L-3 Communications CSW 


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