IPC-600-6012 Archives

May 2010

IPC-600-6012@IPC.ORG

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From:
"Whittaker, Dewey (EHCOE)" <[log in to unmask]>
Reply To:
(Combined Forum of D-33a and 7-31a Subcommittees)
Date:
Wed, 26 May 2010 08:56:58 -0700
Content-Type:
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Who says osmosis doesn't work.
Dewey

-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of John Perry
Sent: Tuesday, May 25, 2010 3:09 PM
To: [log in to unmask]
Subject: Re: [IPC-600-6012] New rev C Table 3-3

Hi Scott and Everyone,

The more I think about this, the more I am wondering how double-sided
printed boards would be excluded if we just went back to "buried vias >
2 layers"?  There is no such thing as a 2 layer buried via in a double
sided printed board, correct?  

John Perry
Technical Project Manager
IPC - Association Connecting Electronics Industries(r)
3000 Lakeside Drive # 309S
Bannockburn, IL 60015-1249 USA 
+1 847-597-2818 (tel)
+1 847-615-7105 (fax)
+1 847-615-7100 (Main)
[log in to unmask]
www.ipc.org



-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Scott
Bowles
Sent: Tuesday, May 25, 2010 4:08 PM
To: Listserv IPC-600-6012
Subject: Re: [IPC-600-6012] New rev C Table 3-3

John,

I understand what the intent was now but I think I did just what Wendi
probably did and that was read it literally as "Buried Vias ( 2 layers".
This is due to the syntax/punctuation of the heading.  I guess something
more along "Table 3-3 Surface and Hole Copper Plating Minimum
Requirements for Through-Holes and Blind Vias ( 2 Layers, and Buried
Vias > 2 Layers1" may have been more appropriate.



Scott A. Bowles
Director of Engineering and Quality
Hallmark Circuits, Inc.
13500 Danielson Street
Poway, CA 92064

858 513-2200 Office x8848
858 513-2233 Fax
858 437-7827 Cell


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-----Original Message-----
From: John Perry [mailto:[log in to unmask]]
Sent: Tuesday, May 25, 2010 12:31 PM
To: [log in to unmask]
Subject: Re: [IPC-600-6012] New rev C

Hi Everyone,

The "greater than or equal" symbol in the title to Table 3-3 of
IPC-6012C is there by intent.  It is there to address the plain vanilla
2-sided printed boards.  When we split out the plating thickness tables
(used to all be Table 3-2) we picked up greater than 2 layers and all
the sub type constructions, but forgot to include plain double-sided
boards.

John Perry
Technical Project Manager
IPC - Association Connecting Electronics Industries(r)
3000 Lakeside Drive # 309S
Bannockburn, IL 60015-1249 USA
+1 847-597-2818 (tel)
+1 847-615-7105 (fax)
+1 847-615-7100 (Main)
[log in to unmask]
www.ipc.org



-----Original Message-----
From: IPC-600-6012 [mailto:[log in to unmask]] On Behalf Of Jose A
Rios
Sent: Tuesday, May 25, 2010 2:17 PM
To: Listserv IPC-600-6012
Subject: Re: [IPC-600-6012] New rev C

it sure looks that way....

Joey Rios
PWB & Process Quality Eng'r
Endicott Interconnect Technologies
1093 Clark St.
Endicott, NY 13760
Office: 607-755-5896



Wendi Boger <[log in to unmask]>
Sent by: IPC-600-6012 <[log in to unmask]>
05/25/2010 02:35 PM
Please respond to
"(Combined Forum of D-33a and 7-31a Subcommittees)"
<[log in to unmask]>


To
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Subject
[IPC-600-6012] New rev C






Everyone,



    Is there a typo on Table 3-3 in 6012 Rev C?  Shouldn't it say > 2
layers not >/= 2 layers.  The 2 layers buried via would be covered under
Table 3-5.



Wendi



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