I have found that thickness and size of the PCB in the array make a huge
difference in how close you can get to the edge.  Another factor is your
means of separation.  Lastly, SMT components are more sensitive to the
forces that need to be applied that will separate the PCB's.  The type SMT
device and the size of lands are considerations also.  I haven't seen any
particular spec's on spacing from edge tabs, but here's what I've found to
be adequate, generally.  On Std. PCB's (.062 thk) with 33% top and bottom
score depths, leaving a scored web of about .020, I keep all copper at least
.028 from center of score line, through hole pads at least .050 to edge of
pad to center of score line, 2-pin discrete SMD's .120 from edge of pad to
center of score and multi-leaded SMT IC packs at least .200, edge of closest
pads to center of score line.  I have not had falures dedicated to those
spacings.  The larger and thinner the PCBs in the array, and the thicker the
score web material, more flex and therefore the more damage potential is
likely.  Best if you can separate the PCB's with a CAB type machine rather
than snapping them by hand.  Minimize the bending and snapping forces and
you'll have more success being close to the edge.  Regards, - Russ.
-----Original Message-----
From: Paul Brionez <[log in to unmask]>
To: [log in to unmask] <[log in to unmask]>
Date: Monday, February 08, 1999 3:54 PM
Subject: [DC] Board to Component Clearance for Scoring


>        I would like to know what the minimum spacing that you use in
>designing a board that will be scored for component clearances.
>
>Quality has a question?
>
>Thanks in advance.
>
>Paul Brionez
>Sr. PCB Designer
>Cherry Electrical Products
>11200 88th Ave
>P.O. Box 581913
>Pleasant Prairie, WI 53158-0913
>PH 414-942-6659
>Fax 414-942-6334
>Pager 414-318-9964
>[log in to unmask]
>
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