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July 1999

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Subject:
From:
Bob Landman <[log in to unmask]>
Reply To:
Bob Landman <[log in to unmask]>
Date:
Fri, 23 Jul 1999 14:35:09 -0400
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Dear Hope (your name says it all in PC board design these days!).

Some basics:

The equation for C (in Farads) = 8.85E-12)K(A/D) where A is in square meters, D
is the distance between the electrodes in meters, K is the dielectric constant,
a non-dimensional ratio of air or vacuum [1] to whatever material you are using
[ glass = 4.8 - 8.0, ceramic = 12 to 400,000 and now you see why ceramic caps
are so much smaller than paper/mylar caps].

So, a 1 millimeter spacing in vacuum would call for plates 6.5 miles on a
side!!!  Now you see what we are up against and why materials to get K as large
as possible are used (consistent with temperature coefficients of K because K is
not going to be constant over a wide temp range.

Add to this that all capacitors have inductance and resistance and so the charge
is inhibited from coming out of the cap, the bigger it is.

+++++++++++++++

Ed Blasco wrote me to say:

The purpose of the caps being built into the plane is to give the switching
current for your IC's.  The rise time currents of todays IC's (di/dt)  require
between 300 to 1000 pf of capacitance to provide the quick responce.
We generally call out for .004 inches max between the power and ground plane to
get this capacitance or add .001's in parallel with our .1's for the faster
current response.

A great book is the  "High Speed Digital Design" a handbook of black magic
ISBN 0-13-395724-1

Please be careful on the advise you receive, from this forum it is not always
right.  PCB Design prints articles from authors that is also incorrect from
time to time so it is hard to know who to believe in.

Best regards,
Ed

++++++++++++

Well, yes, everybody has an opinion.  You have to learn how to sift fact from
fiction and to do this you need to understand the physics, no doubt about it.
Yes, Howard Johnson, who has a Ph.D. has written a good book "High Speed Digital
Design" but I detected some flaws in his writings about EMI noise abatement,
wrote him via e-mail but got no reply.  Here at least we have a public forum
with built in reality checking.  He doesn't seem to have an academic attitude,
no doubt as he sells his opinions (that's my bias as I have probably spent way
too many years in university research).

Yes, the power/ground plane can be a capacitor but if we use the above equation
and substitute 4 mils (half distance = twice the capacitance so less is
definitely more) and set K = 4  (a WAG (wild ass guess as my Chem Rubber
Handbook lists PVC, Teflon, Lucite, etc.. but not glass epoxy laminates) and
let's see what we get for a 1 meter square board...

C (in Farads) = 8.85E-12) * 4 * (1/1.01E-4) = 3.48E-7 Farads or 34.8 uF.  Not
bad.

But, wait a minute.  Lets now reduce that area to a board 20mm x 20 mm
(4.00E-4) and the result is C = 4.00E-4 * 3.48E-7 = 1.39E-10F or 139 pF.  Hey!
Where did all those uF's go??

You can play with these numbers but you see what I mean.  The whole board is a
*distributed* capacitor of just 139 pF - how much of that is near the IC pin
sucking the current in 100 psec?  Yes, the inductance is very low but so is the
inductance of an SMT bypass (I'm assuming if you are worried about this kind of
thing you are not using thru-hole caps for bypass).

Paralleling 0.1uF caps with 0.01 uF or 0.001uF caps seems to me to be better but
perhaps the board will do.

Peter's suggestions are good (ferrite) but ugly and as he says expensive to
implement which is why I stay out of the HF arena (for now anyway).

Your call, Hope and Jack.

Uh, better have plenty of Tylenol handy!

Regards,

Bob Landman
H&L Instruments


----- Original Message -----
From: Hope Lariosa <[log in to unmask]>
To: <[log in to unmask]>
Sent: July 23, 1999 10:23 AM
Subject: Re: [DC] BGA Assembly by hand


> Thanks for all the responses to this topic.  Now to apply quite a bit of it
> to my board.
>
> Hope
>

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