Hi,
Could someone enlighten me as to the potential problems of having reflowed
paste under the body of an IC. I am assuming if the paste contacted the
body of the IC, problems could occur...., but what sort of problems.
We have one case where we have a SO8 inside a SO8W package. This was done
by engineers at my company, before they had PCB designers. I looked at it,
and didn't like it much. I asked our factory about it, but they have no
concerns, so I left it alone.
Regards,
Steve
Date sent: Wed, 7 Aug 2002 13:54:42 +1000
Send reply to: "(Designers Council Forum)" <[log in to unmask]>,
Dom Bragge <[log in to unmask]>
From: Dom Bragge <[log in to unmask]>
Organization: Klaxon IQA
Subject: Re: [DC] Land Pattern within Land Pattern (TQFP)
To: [log in to unmask]
> > "Robert M. Wolfe" wrote:
> >
> > I have a situation where there is a need to provide a dual
> > footprint pattern for an alternate package.
>
> > Or would using an OSP coating solve the problem, but I guess that
> > coating once gone would leave exposed copper under that part.
>
> I would tread very carefully leaving just an OSP over bare Copper in the
> long term.
>
> When having done dual footprints before because of single sourced parts,
> I've found using some sort of HASL with two different paste masks to be a
> good solution. Well, at least designing two paste masks & getting the one
> first needed made - the other paste mask design is then your fallback
> solution. Also, if you are considering Alpha Levelling or other non
> tin/lead surface treatments, then look at the long term consequences. If
> you are doing it for a fallback solution, you could maybe do it by
> designing in the alternate footprint but leaving the second footprint
> covered by solder mask. Not quite as interchangeable, but you could
> generate two topside solder masks as well as paste masks & still be able to
> use OSPs etc. It depends on how you'll handle the data for future use &
> whether you stockpile PCBs or get them JIT.
>
> I concur that you shouldn't screen solder paste *under* a component that
> doesn't use it.
>
> --
> Dom Bragge CID "The pink building"
> Production Manager Level 1, IBC Bldg
> KLAXON IQA Australian Technology Park
> bh+61-2-9209-4404 Eveleigh 1430 NSW
> fx+61-2-8374-5030 (Sydney, AUSTRALIA)
> www.klaxoniqa.com
>
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Steve Kingdon 27 Nazareth Avenue
PCB Layout Engineer PO Box 8011
Allied Telesyn Research Christchurch
phone +64 3 339 9223 New Zealand
fax +64 3 339 3002
email: [log in to unmask]
web: http://www.alliedtelesyn.co.nz/
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