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February 2015

DesignerCouncil@IPC.ORG

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Subject:
From:
Tom Hausherr <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Thu, 26 Feb 2015 06:28:22 -0800
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text/plain
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text/plain (116 lines)
Bob, 

I agree with you 100%. I think that most CAD tools have layers for Top and Bottom Assembly. When you create you PCB library, add an outline on the Top Assembly and when the part is placed on the Bottom Side the Top Assembly Outline moves to that layer. Also having a separate Ref Des inside the Assembly Outline Rectangle is prefect for assembly because it never leaves the center of the rectangle and it's impossible to screw up. 

Last year I accidentally swapped two silkscreen ref des and the assembly shop called and described the error. My answer back was "The Assembly Drawing is correct and the silkscreen is wrong". Good thing it was just a prototype run. :-) 

The silkscreen outline is hatched today and only follows the maximum component outline for "Standard Packages" and does not go around pins (this concept does not include connectors or unique packages). So generally silkscreen outlines do not make a good robust Assembly Outline. And the silkscreen ref des is always placed outside the part and visible after assembly and if you get it wrong your parts could get swapped and the EE engineer pulls out hair trying to find out why the board doesn't work. 

The Pin 1 indicator is a "User Preference" as these characters are used: "o",  "1",  "+",  "^" and  "|". 

Tom

Tom Hausherr CID+, CIT
President
PCB Libraries, Inc.
13730 Sorbonne Court
San Diego, CA 92128
858.592.4828 Office
858.859.5371 Cell
www.pcblibraries.com  

-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Robert Wolfe
Sent: Thursday, February 26, 2015 6:08 AM
To: [log in to unmask]
Subject: Re: [DC] A note and comment for the IPC 7351 land pattern footprint revision committee at APEX.

James,
I have always used separate layers Assy & Silk Problem was with a stint on Protel they really had no dedicated assy layers only silk and no easy way to do double sided assy's But finally made the ability for paired draft layers. These were not dedicated to assy you just needed to pick two to pair So when pushing a part to other side you had proper assy info there with designators.
That is still a bit of an issue I have with Altium having no dedicated assy layers even though what did does work.
So many who used Protel still only use silkscreen as both silk and assy. IMHO not optimal.
I believe all CAD systems should have dedicated layers for these for same reason you really don't want the ref des for Silk in same place as assy.  With tight boards being able to have the assy Ref Des in a better location to know which part is which is a good thing.
Bob

-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of James Jackson
Sent: Wednesday, February 25, 2015 5:26 PM
To: [log in to unmask]
Subject: Re: [DC] A note and comment for the IPC 7351 land pattern footprint revision committee at APEX.

I think that the problem is that folks may be trying to use the Silkscreen layer for the Assembly layer.

I never do this. Instead, I create another set of information that describes the actual outline of the part, and place it on what I call Top Assembly (or Bottom Assembly) layer. This then gets printed with a titleblock and a set of Assembly notes for assembly.

I can put as much information on the Assembly layer to describe the part outline adequately for assembly.

Unfortunately, I do not see this practice being used among other designers, or other CAD packages out there today. Most designers use the Silkscreen layers to describe the parts.

Regards,

James Jackson
Oztronics


On 2015-02-25 15:22, Pete Houwen wrote:
> I have never been a fan of using electrical information as silkscreen 
> identifiers.  Understand the primary purpose of an orientation 
> indicator is, well, orientation.  Assemblers and inspectors need to be 
> able to identify physical orientation FAR more often than anyone who 
> would be looking at the board for electrical concerns.  And anyone 
> with electrical concerns has access to schematics, datasheets, etc.
> So silkscreen orientation marks should in some way mimic the actual 
> mark on the package.  Pin number "1" can even be ambiguous to an 
> inspector.  What does "1" mean?  There's a dot on this chip, is that 
> pin 1?
>
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