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February 2007

DesignerCouncil@IPC.ORG

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Subject:
From:
John Parsons <[log in to unmask]>
Reply To:
(Designers Council Forum)
Date:
Tue, 6 Feb 2007 15:06:42 -0800
Content-Type:
text/plain
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text/plain (91 lines)
Foolproof!  Not sure if there is such a thing;

- Eliminate the use of screen printed legend unless you really, really need
it.  Most boards are so dense these days that it is next to useless anyway.
- Train your CAD librarian or whomever to design proper footprints/outlines
to begin with.
- If it really is an ongoing issue with your fab shop, find another
- Legend on SMD pads is an IPC violation so if you are spec'ing a build to
IPC requirements then, as with the note suggested below, you have a case for
an RMA but this is the last course of action you would want to take as it
costs everyone involved time and money.

Good luck,
John 

-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of Mitch S.
Morey
Sent: Tuesday, February 06, 2007 2:51 PM
To: [log in to unmask]
Subject: Re: [DC] Silk Screen Verification

Sure do. We have a note on the drawing that states in essence: "There
SHALL be no silkscreen on any solderable land site..." Works all the time,
and give you the rejection wording just in case.

Good day.
Mitch
>
> We are having problems with our Fab House. If we forget to remove a silk
> screen and it's on a pad sometimes they won't take it off and we are stuck
(snip)
> Does anyone have a process that makes this fool proof?
>
> Thanks,
> Steve
>
>
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