Tony,
Thanks for your thoughts. You are giving the designers of this board too
much credit :o) . I have now obtained the specs and I see where they got
the 1.4mm setback dimension from. This is not a setback at all but the
dimension for the bevel. They also are not using the last-mate first-break
functionality of the PRSNT1# and 2# pins as all fingers are the same length.
Furthermore, the ground under the connectors on the outer layers will not
all be removed by the bevel so if the mask was to be scrapped through during
insertion then the fingers will be shorted together.
I will have to dig deeper to see what others are doing for bussing these
last-mate first-break fingers. On older designs with larger pitch I have
seen fingers bussed out the side of the finger but that is not possible on
these designs. I have also seen them bussed out to inner layers and broken
after plating with a drill.
Thanks again for the discussion.
John
-----Original Message-----
From: Cosentino, Tony [mailto:[log in to unmask]]
Sent: Wednesday, December 07, 2005 11:29 AM
To: (Designers Council Forum); John Parsons
Subject: RE: [DC] PCI Express Bus Spec's
John,
The PRSNT1# and PRSNT2# pins are 1 mm shorter than the other fingers.
Those pins are designated as A1, B17, B31, B48, and B81, where
applicable. No plating tie bar is allowed underneath the PRSNT1# and
PRSNT2# pins because those pins are meant to be last-mate and
first-break. However, the other pins could have a plating tie bar. The
standard requirements for plating these pins are 30 micro-inches of gold
over 50 micro-inches of nickel. I can't figure out how you could be
allowed to add a plating bar to accomplish this plating task without
compromising the shorter pins and violating the "Mate Last / Break
First" requirement. The copper the company added below the connector
fingers will more than likely be removed during the board edge
chamfering operations. More-over, the copper that was added to the
boards edge was probably added, on purpose, so that the bare board
manufacture could not use a plating bar which in-turn would have
violated the "Mate Last / Break First" pins. On an additional note,
there should not be ground and/or power planes underneath the edge
fingers as these planes could effect signal performance. These planes
could add too much capacitance and greatly degrade connector
performance.
Hope this information is useful,
Thanks
Tony Cosentino
Tekelec - PCB Design Engineer
919-460-3656
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of John
Parsons
Sent: Wednesday, December 07, 2005 1:56 PM
To: [log in to unmask]
Subject: Re: [DC] PCI Express Bus Spec's
Thanks all,
I have been to that site before. I was thinking that the spec would be
available on-line without cost similarly to the standard PCI spec.
My particular concern (we are a fab shop) is that I have a customer
using this specification and he says that it calls for the edge
connector fingers to stop 1.4mm. What they have done then is filled
this void area (between end of fingers and board edge) with ground
plane. Makes bussing the fingers out for electroplating impossible.
Selective hard gold plating is possible but certainly ads $$$ to the
part.
As an aside, on a standard edge finger design for the PCI Express bus,
are there any concerns with doing a standard gold finger buss off the
center of the finger to beyond the board edge? This would of course
somewhat defeat the purpose of setting the fingers back 1.4mm in the
first place. What is generally being done in this regard?
Thanks
John Parsons
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of
Cosentino, Tony
Sent: Wednesday, December 07, 2005 9:25 AM
To: [log in to unmask]
Subject: Re: [DC] PCI Express Bus Spec's
John,
You can go to www.pcisig.com. You will need the PCI Express Card
Electromechanical Specification. Or you can call them at 1-800-433-5177.
I am not sure what the cost is but be sure it will cost you.
Thanks
Tony Cosentino
Tekelec
919-460-3656
www.tekelec.com
-----Original Message-----
From: DesignerCouncil [mailto:[log in to unmask]] On Behalf Of John
Parsons
Sent: Wednesday, December 07, 2005 12:06 PM
To: [log in to unmask]
Subject: [DC] PCI Express Bus Spec's
Hi all,
Can anyone point me to spec's for the PCI Express Bus. In particular I
am looking for the PCB connector finger layout information.
Regards
John Parsons
Enigma Interconnect Inc. - Vancouver
---------------------------------------------------------------------------------
DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF DesignerCouncil.
To temporarily stop/(restart) delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL/(MAIL)
Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives
Please visit IPC web site http://www.ipc.org/contentpage.asp?Pageid=4.3.16 for additional information, or contact Keach Sasamori at [log in to unmask] or 847-615-7100 ext.2815
---------------------------------------------------------------------------------
|
